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74ALVT16543 반도체 회로 부품 판매점

2.5V/3.3V ALVT 16-bit registered transceiver 3-State



NXP Semiconductors 로고
NXP Semiconductors
74ALVT16543 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74ALVT16543
2.5V/3.3V ALVT 16-bit registered
transceiver (3-State)
Product specification
Supersedes data of 1995 Dec 21
IC23 Data Handbook
1998 Feb 13
Philips
Semiconductors


74ALVT16543 데이터시트, 핀배열, 회로
Philips Semiconductors
2.5V/3.3V 16-bit registered transceiver (3-State)
Product specification
74ALVT16543
FEATURES
16-bit universal bus interface
5V I/O Compatible
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
DESCRIPTION
The 74ALVT16543 is a high-performance BiCMOS product
designed for VCC operation at 2.5V or 3.3V with I/O compatibility up
to 5V. The device can be used as two 8-bit transceivers or one
16-bit transceiver.
The 74ALVT16543 contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are Low, the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With nEAB and nOEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
2.5V
3.3V
UNIT
tPLH
tPHL
CIN
CI/O
ICCZ
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance DIR, OE
I/O pin capacitance
Total supply current
CL = 50pF
VI = 0V or VCC
Outputs disabled; VI/O = 0V or VCC
Outputs disabled
1.8 1.6
2.7 1.8
33
99
40 70
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ALVT16543 DL
–40°C to +85°C
74ALVT16543 DGG
NORTH AMERICA
AV16543 DL
AV16543 DGG
DWG NUMBER
SOT371-1
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56 1EN3 (BA)
54 G1
55 1C5
1 2EN4 (AB)
3 G2
2 2C6
29 7EN9 (BA)
31 G7
30 7C11
28 8EN10 (AB)
26 G8
27 8C12
5
3 5D
52 15
9 11 D
6D 4
12 D
10
6 51 16
8 49 17
9 48 19
10 47 20
12 45 21
13 44 23
14 43 24
42
41
40
38
37
36
34
33
SW00151
1998 Feb 13
2 853-1823 18958




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74ALVT16543 transceiver

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