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PDF 74ALVCH16500DGG Data sheet ( Hoja de datos )
| Número de pieza | 74ALVCH16500DGG | |
| Descripción | 18-bit universal bus transceiver 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74ALVCH16500
18-bit universal bus transceiver (3-State)
Product specification
Supersedes data of 1998 Aug 31
IC24 Data Handbook
1998 Sep 24
Philips
Semiconductors
1 page  
Philips Semiconductors
18-bit universal bus transceiver (3-State)
LOGIC DIAGRAM (one section)
OEAB
CPBA
LEBA
CPAB
LEAB
OEBA
Product specification
74ALVCH16500
C1 C1
Bn
An 1D 1D
C1
1D
18 IDENTICAL CHANNELS
C1
1D
FUNCTION TABLE
INPUTS
OUTPUTS
OEAB
LEAB
CPAB
An
Bn
LHXX
Z
HHXH
H
HHX L
L
H↓Xh
H
H↓X I
L
HL↓h
H
HL↓ I
L
H L H or L X
H
H L H or L X
L
NOTE: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA, and CPBA.
H = High voltage level
h = High voltage level one set-up time prior to the Enable or Clock transition
L = Low voltage level
I = Low voltage level one set-up time prior to the Enable or Clock transition
NC= No Change
X = Don’t care
Z = High Impedance ”off” state
↓ = High-to-Low Enable or Clock transition
SW00090
OPERATING MODE
Disabled
Transparent
Latch data & display
Clock data & display
Hold data & display
1998 Sep 24
5
5 Page 
Philips Semiconductors
18-bit universal bus transceiver (3-State)
TEST CIRCUIT
VCC
PULSE
GENERATOR
VI
RT
D.U.T.
VO
CL
S1
2 * VCC
Open
GND
RL = 500 Ω
RL = 500 Ω
Test Circuit for switching times
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST
S1
VCC
VI
tPLH/tPHL
Open
< 2.7V
VCC
tPLZ/tPZL
tPHZ/tPZH
2 < VCC
GND
2.7–3.6V
2.7V
SV00906
Waveform 5. Load circuitry for switching times
Product specification
74ALVCH16500
1998 Sep 24
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet 74ALVCH16500DGG.PDF ] | |
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