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PDF 74ALVC245MTC Data sheet ( Hoja de datos )
| Número de pieza | 74ALVC245MTC | |
| Descripción | Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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September 2001
Revised February 2002
74ALVC245
Low Voltage Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B ports
by placing them in a high impedance state.
The 74ALVC245 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s Power-off high impedance inputs and outputs
s Supports Live Insertion and Withdrawal (Note 1)
s tPD
3.4 ns max for 3.0V to 3.6V VCC
3.9 ns max for 2.3V to 2.7V VCC
6 ns max for 1.65V to 1.95V VCC
s Uses patented Quiet Series noise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high impedance state during power up and power
down, OEn should be tied to VCC through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74ALVC245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ALVC245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
T/R
A0–A7
B0–B7
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2002 Fairchild Semiconductor Corporation DS500647
www.fairchildsemi.com
1 page  
AC Loading and Waveforms
TABLE 1. Values for Figure 1
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
SWITCH
Open
VL
GND
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50Ω)
Symbol
Vmi
Vmo
VX
VY
VL
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
6V
VCC
2.7V
2.5V ± 0.2V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
6V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
VCC*2
1.8V ± 0.15V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
VCC*2
FIGURE 2. Waveform for Inverting and Non-Inverting Functions
FIGURE 3. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
5 www.fairchildsemi.com
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