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74ALVC164245 반도체 회로 부품 판매점

16-bit dual supply translating transceiver



NXP Semiconductors 로고
NXP Semiconductors
74ALVC164245 데이터시트, 핀배열, 회로
74ALVC164245
16-bit dual supply translating transceiver; 3-state
Rev. 8 — 15 March 2012
Product data sheet
1. General description
The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS
device, superior to most advanced CMOS compatible TTL families.
The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. It is
designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply
environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The direction control inputs (1DIR and 2DIR) determine the direction of the data flow.
nDIR (active HIGH) enables data from nAn ports to nBn ports. nDIR (active LOW) enables
data from nBn ports to nAn ports. The output enable inputs (1OE and 2OE), when HIGH,
disable both nAn and nBn ports by placing them in a high-impedance OFF-state. Pins
nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B).
In suspend mode, when one of the supply voltages is zero, there will be no current flow
from the non-zero supply towards the zero supply. The nAn-outputs must be set 3-state
and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(B) VCC(A)
(except in suspend mode).
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range:
3 V port (VCC(A)): 1.5 V to 3.6 V
5 V port (VCC(B)): 1.5 V to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Control inputs voltage range from 2.7 V to 5.5 V
Inputs accept voltages up to 5.5 V
High-impedance outputs when VCC(A) or VCC(B) = 0 V
Complies with JEDEC standard JESD8-B/JESD36
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and 40 C to +125 C


74ALVC164245 데이터시트, 핀배열, 회로
NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Temperature
range
74ALVC164245DL 40 C to +125 C
Package
Name
SSOP48
74ALVC164245DGG 40 C to +125 C TSSOP48
74ALVC164245BX 40 C to +125 C HXQFN60
Description
Version
plastic shrink small outline package; 48 leads;
body width 7.5 mm
SOT370-1
plastic thin shrink small outline package; 48 leads; SOT362-1
body width 6.1 mm
plastic compatible thermal enhanced extremely
thin quad flat package; no leads; 60 terminals;
body 4 6 0.5 mm
SOT1134-2
4. Functional diagram
1DIR
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
Fig 1. Logic symbol
2DIR
1OE
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2OE
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
001aaa789
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© NXP B.V. 2012. All rights reserved.
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74ALVC164245 transceiver

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