74ALVC162245 반도체 회로 부품 판매점

Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in A Port Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74ALVC162245 데이터시트, 핀배열, 회로
October 2001
Revised November 2001
74ALVC162245
Low Voltage 16-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
and 26Series Resistors in A Port Outputs
General Description
The ALVC162245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B Ports by placing
them in a high impedance state.
The 74ALVC162245 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC162245 is also designed with 26series
resistance in the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The 74ALVC162245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I 1.65V–3.6V VCC supply operation
I 3.6V tolerant inputs and outputs
I 26series resistors in A Port outputs
I tPD
3.9 ns max for 3.0V to 3.6V VCC
4.8 ns max for 2.3V to 2.7V VCC
8.6 ns max for 1.65V to 1.95V VCC
I Power-down high impedance inputs and outputs
I Supports live insertion/withdrawal (Note 1)
I Uses patented noise/EMI reduction circuitry
I Latchup conforms to JEDEC JED78
I ESD performance:
Human body model > 2000V
Machine model >200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74ALVC162245T
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
© 2001 Fairchild Semiconductor Corporation DS500679
www.fairchildsemi.com

74ALVC162245 데이터시트, 핀배열, 회로
Connection Diagram
Logic Diagram
Logic Symbol
Pin Descriptions
Pin Names
Description
OEn
T/Rn
A0A15
B0B15
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Truth Tables
Inputs
OE1
T/R1
LL
LH
HX
Outputs
Bus B0B7 Data to Bus A0A7
Bus A0A7 Data to Bus B0B7
HIGH Z State on A0A7, B0B7
Inputs
OE2
T/R2
Outputs
L L Bus B8B15 Data to Bus A8A15
L H Bus A8A15 Data to Bus B8B15
H X HIGH Z State on A8A15, B8B15
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs and I/Os may not float)
Z = High Impedance
www.fairchildsemi.com
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74ALVC162245 transceiver

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