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Fairchild Semiconductor |
August 1999
Revised October 1999
74ACT16245
16-Bit Transceiver with 3-STATE Outputs
General Description
The ACT16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. Each has
separate control inputs which can be shorted together for
full 16-bit operation. The T/R inputs determine the direction
of data flow through the device. The OE inputs disable both
the A and B ports by placing them in a high impedance
state.
Features
s Bidirectional non-inverting buffers
s Separate control logic for each byte
s 16-bit version of the ACT245
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT16245SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT16245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Description
Pin Names
OEn
T/R
A0–A15
B0–B15
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs/Outputs
Side B Outputs/Inputs
FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS500296
www.fairchildsemi.com
Functional Description
The ACT16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs. The device is byte controlled
with each byte functioning identically, but independent of
the other. The control pins can be shorted together to
obtain full 16-bit operation. The following description
applies to each byte. When the T/R input is HIGH, then Bus
A data is transmitted to Bus B. When the T/R input is LOW,
Bus B data is transmitted to Bus A. The 3-STATE outputs
are controlled by an Output Enable (OEn) input for each
byte. When OEn is LOW, the outputs are in 2-state mode.
When OEn is HIGH, the outputs are in the high impedance
mode, but this does not interfere with entering new data
into the inputs.
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Inputs
Outputs
OE1
T/R1
L L Bus B0–B7 Data to Bus A0–A7
L H Bus A0–A7 Data to Bus B0–B7
H X HIGH-Z State on A0–A7, B0–B7
Inputs
Outputs
OE2
L
L
H
T/R2
L
H
X
Bus B8–B15 Data to Bus A8–A15
Bus A8–A15 Data to Bus B8–B15
HIGH-Z State on A8–A15, B8–B15
Logic Diagram
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