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AD6402 반도체 회로 부품 판매점

IF Transceiver Subsystem



Analog Devices 로고
Analog Devices
AD6402 데이터시트, 핀배열, 회로
a
IF Transceiver Subsystem
AD6402
FEATURES
On-Chip Regulator
PLL Demodulator
On-Chip VCO
No Trims
Excellent Sensitivity
28-Lead SSOP Package
APPLICATIONS
DECT/PWT/WLAN
TDMA FM/FSK Systems
GENERAL DESCRIPTION
The AD6402 is a complete transceiver subsystem for use in
high bit rate radio systems employing FM or FSK modulation.
It is optimized for use in time domain multiple access (TDMA)
systems with communications rates of approximately 1 MBPS.
The AD6402 integrates key functions, including VCOs and a
low drop-out voltage regulator. The AD6402 operates directly
from an unregulated battery supply of 3.1 V to 4.5 V and pro-
vides a regulated voltage output which can be used for VCO
supply regulation on a companion RF chip such as the AD6401.
The AD6402 transceiver consists of a mixer, integrated IF
bandpass filter, IF limiter with RSSI detection, VCO, PLL
demodulator and a low dropout voltage regulator. On receive, it
downconverts an IF signal in the 110 MHz range to a second
IF frequency, this frequency being determined by the demodu-
lator reference divide ratios. It then filters, amplifies, and de-
modulates this signal. The AD6402 provides a filtered baseband
FUNCTIONAL BLOCK DIAGRAM
IFIN
TXOUT
TXOUTB
VCO
LIMITER/FILTER
PLL
DEMOD
2
AD6402
IF
VCO
VOLTAGE
REGULATOR
MODE
CONTROL
VREF
1
DC
OFFSET
COMP
RSSI
CFILT
DOUT
DFILP
PLLOUT
REFSEL
COFF
REFIN
FMMOD2
FMMOD1
VREG VBATT SLREF CTL1...3
MODOUT
data output. On transmit, it accepts a Gaussian Frequency Shift
Keying (GFSK) baseband signal, low-pass filters the signal if
required using the on-chip op amp and modulates the IF VCO
by varying the bias voltage on an off-chip varactor diode used in
the tank circuit.
The AD6402 has multiple power-down modes to maximize
battery life. It operates over a temperature range of –25°C to
+85°C and is packaged in a JEDEC standard 28-lead small-
shrink outline (SSOP) surface-mount package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997


AD6402 데이터시트, 핀배열, 회로
AD6402–SPECIFICATIONS
Parameter
Conditions
IF BANDPASS FILTER
Center Frequency Rejection
Stop Band Rejection
REFIN = 13.824 MHz, REFSEL <0.2 VCC
FO ± 3.0 MHz
FO ± 4.7 MHz
FO ± 6.0 MHz
RECEIVER
Sensitivity
RSSI
Low
High
Slope
Output Impedance
FM Modulated 576 kHz, FM Deviation 288 kHz
BT = 0.5, Demod Output SNR = 10 dB, RS = 150
VOUT = 0.2 V, RS = 150
VOUT = 1.8 V, RS = 150
See Figure 4
DEMODULATOR
Gain
Offset
Lock Time
At Data Filter Output
Referred to SLREF
From SLEEP Mode
From RXLOCK Mode
DATA FILTER OP AMP
Gain
Slew Rate
Gain Bandwidth
Output Swing Low
Output Swing High
Output Impedance
CLOAD = 30 pF
CLOAD = 30 pF
IF VCO
Frequency
SSB Phase Noise
Output Power
2nd Harmonic
3rd Harmonic
Note 1
@ 5 MHz Offset
Differential RLOAD = 300
TRANSMIT FILTER OP AMP
Open Loop Gain
Unity Gain Bandwidth
Output Slew Rate
Minimum Input Voltage
Maximum Input Voltage
Minimum Output Voltage
Maximum Output Voltage
CLOAD = 30 pF
CLOAD = 30 pF
POWER CONTROL
Logical High Threshold
Logical Low Threshold
Turn-On Response Time
VOLTAGE REFERENCE
SLREF
VCC Steady State
SUPPLY REGULATOR
Output Voltage
Turn-On Time
Line Regulation
Load Regulation
For Battery Voltages from 3.1 V to 4.5 V
1 mV Settling, CLOAD = 100 nF
200 mV Battery Step; 5 mV Settling
10 µA to 30 mA Step; 5 mV Settling
POWER SUPPLY
Supply Current
All VCC at 2.85 V
RXLOCKP
RXLOCK
RXDEMOD
TRANSMIT
STANDBY
SLEEP
NOTES
1Using test tank circuit as shown.
Specifications subject to change without notice.
–2–
AD6402ARS
Min Typ
Max Units
20.736
7
13
16
30
–80
MHz
dBc
dBc
dBc
dBc
dBm
–85 dBm
–5 dBm
20 mV/dB
4 k
1.2
–200
200
20
1.55
+200
V/MHz
mV
µs
µs
2
8
15
0.2
VCC–0.2
50
V/µs
MHz
V
V
131
–139
–12
–22
–24
MHz
dBc/Hz
dBm
dB
dB
75
12
5
1
VCC–0.2
0.2
VCC–0.2
0.8 × VCC
0.2 × VCC
0.5
dB
MHz
V/µs
V
V
V
V
V
V
µs
1.3 1.5 V
2.75
200
1
200
2.95 V
µs
µs
µs
30 mA
17 mA
26 mA
6 mA
300 µA
10 µA
REV. 0




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AD6402 transceiver

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