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PDF NOIL1SM0300A Data sheet ( Hoja de datos )
| Número de pieza | NOIL1SM0300A | |
| Descripción | LUPA300 CMOS Image Sensor | |
| Fabricantes | ON Semiconductor | |
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NOIL1SM0300A
LUPA300 CMOS Image
Sensor
Features
• 640(H) x 480(V) Active Pixels (VGA Resolution)
• 9.9 mm x 9.9 mm Square Pixels (Based on the High-Fill Factor
Active Pixel Sensor Technology of FillFactory (US patent No.
6,225,670 and others)).
• Optical Format: 1/2 Optical Inch
• Pixel Rate of 80 MHz
• Frame Rate: 250 fps at Full Resolution
• On-Chip 10 bit ADCs
• Global Shutter
• Subsampling (Y Direction)
• Serial Pheripheral Interface (SPI)
• Programmable Read Out Direction (X and Y)
• Random Programmable Windowing
• Power Dissipation: 190 mW
• 48-pin LCC Package
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
Applications
• Machine Vision
• Motion Tracking
Figure 1. LUPA300 Package Photo
Overview
This document describes the interfacing and driving of the LUPA300 image sensor. The pixel size and resolution result in a
6.3 mm x 4.7 mm optical active area (1/2 inch).
This VGA-resolution CMOS active pixel sensor features global shutter and a maximal frame rate of 250 fps in full
resolution, where integration during readout is possible. The readout speed can be boosted by means of subsampling and
windowed Region Of Interest (ROI) readout. High dynamic range scenes can be captured using the double and multiple slope
functionality. User programmable row and column start/stop positions allow windowing. subsampling reduces resolution
while maintaining the constant field of view and an increased frame rate. The programmable gain and offset amplifier maps
the signal swing to the ADC input range. A 10-bit ADC converts the analog data to a 10-bit digital word stream. The sensor
uses a 3-wire Serial-Parallel (SPI) interface. It operates with a 3.3 V and 2.5 V power supply and requires only one master
clock for operation up to 80 MHz pixel rate. It is housed in an 48-pin ceramic LCC package.
The sensor is available in a monochrome version or Bayer (RGB) patterned color filter array.
This data sheet allows the user to develop a camera-system based on the described timing and interfacing.
ORDERING INFORMATION
Marketing Part Number
NOIL1SM0300A-QDC
NOIL1SE0300A-QDC
NOIL1SM0300A-WWC
Description
Mono with Glass
Color micro lens with Glass
Mono Wafer Sales
NOTE: For more information, see Ordering Code Information on page 27.
Package
48 pin LCC
Wafer Sales
© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. 10
1
Publication Order Number:
NOIL1SM0300A/D
1 page  
NOIL1SM0300A
SENSOR ARCHITECTURE
The floor plan of the architecture is shown in Figure 4. The
image core consists of a pixel array, an X- and Y-addressing
register, pixel array drivers, and column amplifiers. The
image sensor of 640 x 480 pixels is read out in progressive
scan.
The architecture allows programmable addressing in the
x-direction in steps of 8 pixels and in the y-direction in steps
of 1 pixel. The starting point of the address is uploadable by
means of the Serial Parallel Interface (SPI).
The PGAs amplify the signal from the column and add an
offset so the signal fits in the input range of the ADC. The
four ADCs then convert the signal to the digital domain.
Pixels are selected in a 4 * 1 kernel. Every ADC samples the
signal from one of the 4 selected pixels. Sampling frequency
is 20 MHz. The digital outputs of the four ADCs are
multiplexed to one output bus operating at 80 MHz.
Figure 4. Floor Plan of the Sensor
Pixel Architecture
The LUPA300 is designed on the 6T pixel architecture.
Color Filter
The LUPA300 can also be processed with a Bayer RGB
color pattern. Pixel (0,0) has a red filter.
Figure 5. Color Filter Arrangement on the Pixels
http://onsemi.com
5
5 Page 
NOIL1SM0300A
Global Shutter
In a global shutter light integration takes place on all
pixels in parallel, although subsequent readout is sequential.
Figure 10 shows the integration and read out sequence for
the synchronous shutter. All pixels are light sensitive at the
same period of time. The whole pixel core is reset
simultaneously and after the integration time all pixel values
are sampled together on the storage node inside each pixel.
The pixel core is read out line by line after integration. Note
that the integration and read out cycle can occur in parallel
or in sequential mode.
Line number
Integration time
Time axis
Burst Readout time
Figure 10. Synchronous Shutter Operation
Non Destructive Readout (NDR)
time
Figure 11. Principle of Non Destructive Readout [1]
The sensor can also be read out in a non destructive way.
After a pixel is initially reset, it can be read multiple times,
without resetting. The initial reset level and all intermediate
signals can be recorded. High light levels saturate the pixels
quickly, but a useful signal is obtained from the early
samples. For low light levels, one has to use the later or latest
samples. Essentially an active pixel array is read multiple
times, and reset only once. The external system intelligence
takes care of the interpretation of the data. Table 11
summarizes the advantages and disadvantages of non
destructive readout.
NOTE 1:This mode can be activated by setting the NDR SPI register. The NDR SPI register must only be changed during FOT. The NDR
bit should be set high during the first Frame Overhead Time after the pixel array is reset; the NDR bit must be set low during the last
Frame Overhead Time before the pixel array is being reset.
http://onsemi.com
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