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PDF BF3710 Data sheet ( Hoja de datos )

Número de pieza BF3710
Descripción CMOS Image Sensor
Fabricantes BYD 
Logotipo BYD Logotipo



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No Preview Available ! BF3710 Hoja de datos, Descripción, Manual

BYD Microelectronics Co., Ltd.
BF3710 Datasheet
Preliminary
HD720P CMOS Image Sensor
BF3710
Datasheet
BF3710 Datasheet
TS-SEN-PD-0012 Rev.A/2
Page 1 of 29
http://www.Datasheet4U.com

1 page




BF3710 pdf
BYD Microelectronics Co., Ltd.
5. Functional Overview
Confidential BF3710
Pixel Array
Column CDS
ASP
10-bit ADC
Image Core
Timing Control
BF3710
two-wire
serial
Interface
SDA
SCL
Image Signal Processing
Lens shading
Bad pixel correction
Gamma correction
Auto exposure
Auto white balance
Bayer/
RGB444/
RGB555/
RGB565/
YCbCr4:2:2
VCLK
HSYNC
VSYNC
Figure 1. Block Diagram
BF3710 has an active image array of 1297x817 pixels. The active pixels are read out progressively
through column/row driver circuits. In order to reduce fixed pattern noise, CDS circuits are adopted. The
ASP block is mainly used to control global gain and color gains to get accurate exposure and white
balance under different light condition and color temperature. The analog signal is transferred to digital
signal by A/D converter. The digital signals are processed in the ISP Block, including Bayer interpolation,
low pass filter, color correction, gamma correction, skin detection, scaling and data format conversion
and so on. Users can easily control these functions via two-wire serial interface bus.
BF3710 Datasheet
TS-SEN-PD-0012 Rev.A/2
Page 5 of 29

5 Page





BF3710 arduino
BYD Microelectronics Co., Ltd.
VSYNC
5 x tLINE
13tLINE
HREF
1280 tP
Confidential
820 x tLINE
800 x tLINE
tLINE=1428tP
148tP
BF3710
2tLINE
D[7:0]
Invalid Data
Invalid Data
P0~P1279
Row0 Row1 Row2 Row799
Figure 6(a). WXGA(1280x800) YUV Frame Timing
VSYNC
5 x tLINE
24tLINE
HREF
1280 tP
750 x tLINE
720 x tLINE
tLINE=1542tP
262tP
1tLINE
D[7:0]
Invalid Data
Invalid Data
P0~P1279
Row0 Row1 Row2 Row719
Figure 6(b). 720P(1280x720) YUV Frame Timing
Table 4. AC Characteristics
Symbol
tP
fMCLK
fVCLK
Descriptions
tP=2 x tMCLK
Master Clock Frequency
Video Clock Frequency
for Raw data , fV= fMCLK /2
for YUV, fV= fMCLK
Min.
--
--
--
Typ.
27.78
72
36/72
Max.
--
--
Unit
ns
MHz
-- MHz
BF3710 Datasheet
TS-SEN-PD-0012 Rev.A/2
Page 11 of 29

11 Page







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