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High Efficiency Synchronous Step-Down Switching Regulators



Analog Devices 로고
Analog Devices
ADP1148AR-5 데이터시트, 핀배열, 회로
a
High Efficiency Synchronous
Step-Down Switching Regulators
ADP1148, ADP1148-3.3, ADP1148-5
FEATURES
Operation From 3.5 V to 18 V Input Voltage
Ultrahigh Efficiency > 95%
Low Shutdown Current
Current Mode Operation for Excellent Line and Load
Transient Response
High Efficiency Maintained Over Wide Current Range
Logic Controlled Micropower Shutdown
Short Circuit Protection
Very Low Dropout Operation
Synchronous FET Switching for High Efficiency
Adaptive Nonoverlap Gate Drives
APPLICATIONS
Notebook and Palmtop Computers
Portable Instruments
Battery Operated Digital Devices
Industrial Power Distribution
Avionics Systems
Telecom Power Supplies
GPS Systems
Cellular Telephones
GENERAL DESCRIPTION
The ADP1148 is part of a family of synchronous step-down
switching regulator controllers featuring automatic sleep mode
to maintain high efficiencies at low output currents. These
devices drive external complementary power MOSFETs at
switching frequencies up to 250 kHz using a constant off-time
current-mode architecture.
FUNCTIONAL BLOCK DIAGRAM
ADP1148
ADJUSTABLE
PWR SIGNAL
VERSION
VIN P-DRIVE N-DRIVE GND GND SENSE(+) VFB SENSE(–)
31
14 12 11
89
7
SLEEP
S
VTH2
4
CT
NON-OVERLAP
DRIVE
1
QR
VTH1
S
T
2
R
QS
C
10mV to
150mV
OFF-TIME
CONTROL
VIN
SENSE(–)
VFB
6
ITH
V
B
13k
G
1.25V 100k
REFERENCE
10
SHUTDOWN
5
INT VCC
The constant off-time architecture maintains constant ripple
current in the inductor, easing the design of wide input range
converters. Current-mode operation provides excellent line and
load transient response. The operating current level is user
programmable via an external current sense resistor.
The ADP1148 incorporates automatic Power Saving Sleep
Mode operation when load currents drop below the level re-
quired for continuous operation. In sleep mode, standby power
is reduced to only about 2 mW at VIN = 10 V. In shutdown,
both MOSFETs are turned off.
+
1F
VIN (5.2V TO 18V)
10nF
VIN
INT VCC
P-DRIVE
0V = NORMAL
>1.5V = SHUTDOWN
ADP1148
SHUTDOWN
ITH SENSE(+)
RC
1k
CC
3300pF
CT SENSE(–)
CT N-DRIVE
470pF
S-GND P-GND
TYPICAL APPLICATIONS
CIN +
100F
P-CH
IRF7204
L* RSENSE**
62H 0.05
VOUT
5V/2A
1000pF
N-CH
IRF7403
C1
10BQ040
+ COUT
390F
*COILTRONICS CTX-68-4
**KRL SL-1-C1-0R050L
100
VIN = 6V
95
VIN = 10V
90
85
80
75
FIGURE 1 CIRCUIT
70
0.02
0.2
LOAD CURRENT – A
2
Figure 1. High Efficiency Step-Down Converter
Figure 2. ADP1148-5 Typical Efficiency
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997


ADP1148AR-5 데이터시트, 핀배열, 회로
ADP1148, ADP1148-3.3, ADP1148-5–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (0؇C TA +70؇C,1 VIN = 10 V, VSHUTDOWN = 0 V, unless otherwise noted. See Figure 17.)
Parameter
Symbol Conditions2
Min Typ Max Units
FEEDBACK VOLTAGE
ADP1148 Only
V10 VIN = 9 V
1.21 1.25 1.29 V
FEEDBACK CURRENT
ADP1148 Only
I10
0.2 1.0
µA
REGULATED OUTPUT VOLTAGE
ADP1148-3.3
ADP1148-5
VOUT
VIN = 9 V
ILOAD = 700 mA
ILOAD = 700 mA
3.23 3.33 3.43
4.9 5.05 5.2
V
V
OUTPUT VOLTAGE LINE
REGULATION
dVOUT
TA = +25°C, VIN = 7 V to 12 V,
ILOAD = 50 mA
–40
+40 mV
OUTPUT VOLTAGE LOAD
REGULATION
ADP1148-3.3
ADP1148-5
dVOUT
5 mA < ILOAD < 2 A
5 mA < ILOAD < 2 A
40 65
60 100
mV
mV
SLEEP MODE OUTPUT RIPPLE
INPUT DC SUPPLY CURRENT3
Normal Mode
Sleep Mode (ADP1148-3.3)
Sleep Mode (ADP1148-5)
Shutdown
dVOUT
IQ
ILOAD = 0 A
TA = +25°C
VIN = 4 V < VIN < 18 V
VIN = 4 V < VIN < 18 V
VIN = 4 V < VIN < 18 V
VSHUTDOWN = 2.1 V,
4 V < VIN < 15 V
50
1.6 2.3
160 250
160 250
10 20
mV p-p
mA
µA
µA
µA
CURRENT SENSE THRESHOLD
VOLTAGE4
ADP1148 Only
ADP1148-3.3
ADP1148-5
V8–V7
V9 = VOUT/4 + 25 mV (Forced),
V7 = 5 V, TA = +25°C
V9 = VOUT/4 mV – 25 mV (Forced),
V7 = 5 V
V7 = VOUT + 100 mV (Forced)
V7 = VOUT – 100 mV (Forced)
V7 = VOUT + 100 mV (Forced
V7 = VOUT – 100 mV (Forced)
25
130 150 170
25
130 150 170
25
130 150 170
mV
mV
mV
mV
mV
mV
SHUTDOWN PIN THRESHOLD
ADP1148-3.3, ADP1148-5
V10 TA = +25°C
0.6 0.8 2.0
V
SHUTDOWN PIN INPUT CURRENT I10
0 V < VSHUTDOWN < 8 V, VIN = 18 V
1.2 5
µA
CT PIN DISCHARGE CURRENT
I4
TA = +25°C, VOUT in Regulation,
V7 = VOUT,
VOUT = 0 V
50 65 90
2 10
µA
µA
OFF-TIME
tOFF CT = 390 pF, ILOAD = 700 mA
456
µs
DRIVER OUTPUT TRANSITION
TIMES
tR, tF
CL = 3000 pF (Pins 1, 14)
VIN = 6 V, TA = +25°C
100 200
ns
NOTES
1All limits at temperature extremes are guaranteed via correlation using standard Quality Control methods. Specifications subject to change without notice.
2TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas:
ADP1148AR, ADP1148AR-3.3, ADP1148AR-5: TJ = TA + (PD × 110°C/W)
ADP1148AN, ADP1148AN-3.3, ADP1148AN-5: TJ = TA + (PD × 70°C/W)
3Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. The allowable operating frequency may be limited by power
dissipation at high input voltages.
4The ADP1148 version is tested with external feedback resistors, setting the nominal output voltage to 3.3 V.
Specifications subject to change without notice.
–2– REV. A




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