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74HCT595 반도체 회로 부품 판매점

8-bit serial-in serial or parallel-out shift register



NXP Semiconductors 로고
NXP Semiconductors
74HCT595 데이터시트, 핀배열, 회로
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output
latches; 3-state
Rev. 8 — 25 February 2016
Product data sheet
1. General description
The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a
storage register and 3-state outputs. Both the shift and storage register have separate
clocks. The device features a serial input (DS) and a serial output (Q7S) to enable
cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register.
Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift
register is transferred to the storage register on a LOW-to-HIGH transition of the STCP
input. If both clocks are connected together, the shift register will always be one clock
pulse ahead of the storage register. Data in the storage register appears at the output
whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to
assume a high-impedance OFF-state. Operation of the OE input does not affect the state
of the registers. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
8-bit serial input
8-bit serial or parallel output
Storage register with 3-state outputs
Shift register with direct clear
100 MHz (typical) shift out frequency
Complies with JEDEC standard no. 7A
Input levels:
For 74HC595: CMOS level
For 74HCT595: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Serial-to-parallel data conversion
Remote control holding register


74HCT595 데이터시트, 핀배열, 회로
NXP Semiconductors
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74HC595D
40 C to +125 C SO16
74HCT595D
74HC595DB 40 C to +125 C SSOP16
74HCT595DB
74HC595PW 40 C to +125 C TSSOP16
74HCT595PW
74HC595BQ 40 C to +125 C DHVQFN16
74HCT595BQ
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1
5. Functional diagram
 '6
 6+&3
 05
67$*(6+,)75(*,67(5
46 
 67&3 %,76725$*(5(*,67(5
Fig 1. Functional diagram
 2(
67$7(2873876
4 4 4 4 4 4 4 4
        PQD
74HC_HCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 25 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74HCT595 register

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