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Unisonic Technologies |
UNISONIC TECHNOLOGIES CO., LTD
U74HC165
8-BIT PARALLEL-LOAD SHIFT
REGISTER
DESCRIPTION
The U74HC165 is an 8-bit parallel-load shift register that,
when clocked, shifts the data toward a serial (QH) output.
Parallel-in access to each stage is provided by eight individual
direct data (A-H) inputs that are enabled by a low level at
shift/load (SH/ LD ) input. The U74HC165 also features a
clock-inhibit (CLK INH) function and a complementary serial ( QH )
output.
Clocking is accomplished by a low-to-high transition of the
clock (CLK) input while SH/ LD is held high and CLK INH is held
low. The functions of CLK and CLK INH are interchangeable.
Since a low CLK and a low-to-high transition of CLK INH also
accomplish clocking, CLK INH should be changed to the high
level only while CLK is high. Parallel loading is inhibited when
SH/ LD is held high. While SH/ LD is low, the parallel inputs to
the register are enabled independently of the levels of the CLK,
CLK INH, or serial (SER) inputs.
FEATURES
* Complementary Outputs
* Direct Overriding Load (Data) Inputs
* Gated Clock Inputs
* Parallel-to-Serial Data Conversion
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
U74HC165L-S16-T
U74HC165G-S16-T
U74HC165L-S16-R
U74HC165G-S16-R
U74HC165L-P16-T
U74HC165G-P16-T
U74HC165L-P16-R
U74HC165G-P16-R
Package
SOP-16
SOP-16
TSSOP-16
TSSOP-16
CMOS IC
SOP-16
TSSOP-16
Packing
Tube
Tape Reel
Tube
Tape Reel
www.unisonic.com.tw
Copyright © 2013 Unisonic Technologies Co., Ltd
1 of 7
QW-R502-A44.B
http://www.Datasheet4U.com
U74HC165
PIN CONFIGURATION
CMOS IC
FUNCTION TABLE
SH/ LD
INPUTS
CLK
CLK INH
FUNCTION
L X X Parallel load
H H X No change
H X H No change
H L ↑ Shift↑
H ↑ L Shift↑
↑ Shift=content of each internal register shifts toward serial output QH. Data at SER is shifted into the first register.
LOGIC SYMBOL
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2 of 7
QW-R502-A44.B
http://www.Datasheet4U.com
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