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PDF 74AHCT594 Data sheet ( Hoja de datos )
| Número de pieza | 74AHCT594 | |
| Descripción | 8-bit shift register | |
| Fabricantes | NXP Semiconductors | |
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74AHC594; 74AHCT594
8-bit shift register with output register
Rev. 01 — 4 July 2006
Product data sheet
1. General description
The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register
that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct
overriding clears (SHR and STR) are provided on both the shift and storage registers.
A serial output (Q7S) is provided for cascading purposes.
Both the shift and storage register clocks are positive-edge triggered. If the user wishes to
connect both clocks together, the shift register will always be one count pulse ahead of the
storage register.
2. Features
s Wide supply voltage range from 2.0 V to 5.5 V
s 8-bit serial-in, parallel-out shift register with storage
s Independent direct overriding clears on shift and storage registers
s Independent clocks for shift and storage registers
s Latch-up performance exceeds 100 mA per JESD 78 Class II
s Input levels:
x CMOS levels: 74AHC594 only
x TTL levels: 74AHCT594 only
s ESD protection:
x HBM JESD22-A114-C exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Applications
s Serial-to parallel data conversion
s Remote control holding register
1 page  
Philips Semiconductors
74AHC594; 74AHCT594
8-bit shift register with output register
74AHC594
74AHCT594
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
16 VCC
15 Q0
14 DS
13 STR
12 STCP
11 SHCP
10 SHR
9 Q7S
001aae344
Fig 7. Pin configuration TSSOP16
74AHC594
74AHCT594
terminal 1
index area
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND(1)
15 Q0
14 DS
13 STR
12 STCP
11 SHCP
10 SHR
001aae345
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input
Fig 8. Pin configuration DHVQFN16
6.2 Pin description
Table 2.
Symbol
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
SHR
SHCP
STCP
STR
DS
Q0
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
parallel data output Q1
parallel data output Q2
parallel data output Q3
parallel data output Q4
parallel data output Q5
parallel data output Q6
parallel data output Q7
ground (0 V)
serial data output Q7S
shift register reset SHR (active LOW)
shift register clock input SHCP
storage register clock input STCP
storage register reset STR (active LOW)
serial data input DS
parallel data output Q0
supply voltage
74AHC_AHCT594_1
Product data sheet
Rev. 01 — 4 July 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
5 of 29
5 Page 
Philips Semiconductors
74AHC594; 74AHCT594
8-bit shift register with output register
Table 8. Dynamic characteristics type 74AHC594 …continued
GND = 0 V; tr = tf ≤ 3.0 ns; see Figure 15.
Symbol Parameter
Test conditions
tPLH LOW-to-HIGH
VCC = 3.0 V to 3.6 V; see Figure 10
propagation delay
STCP to Qn
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V; see Figure 10
CL = 15 pF
CL = 50 pF
tPHL HIGH-to-LOW
VCC = 3.0 V to 3.6 V; see Figure 10
propagation delay
STCP to Qn
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V; see Figure 10
CL = 15 pF
CL = 50 pF
tPHL HIGH-to-LOW
VCC = 3.0 V to 3.6 V; see Figure 13
propagation delay
SHR to Q7S
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V; see Figure 13
CL = 15 pF
CL = 50 pF
HIGH-to-LOW
propagation delay
STR to Qn
VCC = 3.0 V to 3.6 V; see Figure 14
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V; see Figure 14
CL = 15 pF
CL = 50 pF
tW pulse width HIGH or CL = 50 pF; see Figure 9 and
LOW SHCP and STCP Figure 10
pulse width HIGH or
LOW SHR and STR
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CL = 50 pF; see Figure 13 and
Figure 14
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tsu set-up time
DS to SHCP
CL = 50 pF; see Figure 11
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
set-up time
SHR to STCP
CL = 50 pF; see Figure 12
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
set-up time
SHCP to STCP
CL = 50 pF; see Figure 10
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
74AHC_AHCT594_1
Product data sheet
Rev. 01 — 4 July 2006
Min Typ Max Unit
- 5.1 8.3 ns
- 7.3 11.9 ns
- 3.5 5.7 ns
- 4.8 7.8 ns
- 5.5 9.1 ns
- 7.3 12.0 ns
- 3.7 6.0 ns
- 5.2 8.5 ns
- 5.7 9.5 ns
- 7.5 12.2 ns
- 4.1 6.7 ns
- 5.4 8.8 ns
- 5.8 9.6 ns
- 7.7 12.5 ns
- 4.1 7.2 ns
- 5.4 9.4 ns
6.0 - - ns
5.5 - - ns
5.0 - - ns
5.0 - - ns
3.5 - - ns
3.0 - - ns
8.0 - - ns
5.0 - - ns
8.0
5.0
- - ns
- - ns
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
11 of 29
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| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet 74AHCT594.PDF ] | |
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