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STMicroelectronics |
74VHC594
8 BIT SHIFT REGISTER
WITH OUTPUT REGISTER
s HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 594
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION
The 74VHC594 is an high speed CMOS 8-BIT
SHIFT REGISTERS fabricated with sub-micron
silicon gate C2MOS technology.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Separate clocks and direct overriding
clear (SCLR, RCLR) are provided for both the shift
register and the storage register.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
M74VHC594RMTR
M74VHC594TTR
A serial (QH’) output is provided for cascading
purposes. Both the shift register and storage
register use positive-edge triggered clocks. If the
clocks are connected together, the shift register
state will always be one clock pulse ahead of the
storage register.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD
immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 5
1/14
74VHC594
Figure 2: Input Equivalent Circuit
Table 3: Truth Table
INPUTS
SI
SCK
SCLR
XX L
LH
RCK
X
X
H HX
L HX
XXXX
XXX
XXX
X: Don’t Care
Table 2: Pin Description
PIN N°
1, 2, 3, 4, 5,
6, 7, 15
9
10
11
13
14
12
8
16
SYMBOL NAME AND FUNCTION
QA to QH Data Outputs
QH’
SCLR
SCK
RCLR
SI
RCK
GND
VCC
Serial Data Output
Shift Register Clear Input
Shift Register Clock Input
Storage Register Clear
Input
Serial Data Input
Storage Register Clock
Input
Ground (0V)
Positive Supply Voltage
RCLR
X
X
X
OUTPUTS
SHIFT REGISTER IS CLEAR
FIRST STAGE OF SHIFT REGISTER GOES LOW
OTHER STAGES STORE THE DATA OF PREVI-
OUS STAGE, RESPECTIVELY
FIRST STAGE OF SHIFT REGISTER GOES HIGH
OTHER STAGES STORE THE DATA OF PREVI-
OUS STAGE, RESPECTIVELY
X SHIFT REGISTER STATE IS NOT CHANGED
L STORAGE REGISTER IS CLEARED
H
SHIFT REGISTER DATA IS STORED IN THE
STORAGE REGISTER
H STORAGE REGISTER STATE IS NOT CHANGED
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