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PDF 74ALS164 Data sheet ( Hoja de datos )
| Número de pieza | 74ALS164 | |
| Descripción | 8-bit serial-in parallel-out shift register | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
74ALS164
8–bit serial–in parallel–out shift register
Product specification
IC05 Data Handbook
1991 Feb 08
Philips
Semiconductors
1 page  
Philips Semiconductors
8-bit serial-in parallel-out shift register
Product specification
74ALS164
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
fMAX
tPLH
tPHL
tPHL
Maximum clock frequency
Propagation delay
CP to Qn
Propagation delay, MR to Qn
TEST CONDITION
Waveform 1
Waveform 1
Waveform 2
LIMITS
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN MAX
50
5.0 13.0
6.0 15.0
8.0 18.0
UNIT
MHz
ns
ns
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
tsu(H)
tsu(L)
th(H)
th(L)
tw(H)
tw(L)
tw(L)
tREC
Setup time, High or Low
Dn to CP
Hold time, High or Low
Dn to CP
Clock pulse width,
High or Low
MR pulse width, Low
Recovery time, MR to CP
TEST CONDITION
Waveform 3
Waveform 3
Waveform 1
Waveform 2
Waveform 2
LIMITS
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN MAX
6.0
5.0
0
0
10.0
7.0
6.0
6.0
UNIT
ns
ns
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.3V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
CP VM
1/fmax
tw(H)
tPHL
VM
tw(L)
VM
tPLH
Qn VM
VM
SF00294
Waveform 1. Propagation Delay for Clock Input to Output,
Clock Pulse Width,
and Maximum Clock Frequency
MR VM
tw(L)
CP
tPHL
VM
tREC
VM
Qn VM
SC00065
Waveform 2. Master Reset Pulse Width,
Master Reset to Output Delay,
and Master Reset to Clock Recovery Time
Dn VM VM
tsu(H) th(H)
VM VM
tsu(L) th(L)
CP VM
VM
SC00064
Waveform 3. Data Setup and Hold Times
1991 Feb 08
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74ALS164.PDF ] | |
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