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PDF IT6605 Data sheet ( Hoja de datos )

Número de pieza IT6605
Descripción Dual-Port HDMI 1.4 Receiver
Fabricantes ITE TECH 
Logotipo ITE TECH Logotipo



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No Preview Available ! IT6605 Hoja de datos, Descripción, Manual

IT6605
Dual-Port HDMI 1.4 Receiver with 3D Support
ITE TECH. INC.
www.ite.com.tw
Sep-2010 Rev:0.9 1/37

1 page




IT6605 pdf
IT6605
Pin Description
Digital Video Onput Pins
Pin Name Direction Description
QE[35:0]
Output Digital Video Output Pins. Channel swap and
MSB-LSB reversal are supported through register
setting.
PCLK
Output
DE
HSYNC
VSYNC
EVENODD
Output
Output
Output
Output
Output data clock. The backend controller should
use the rising edge of PCLK to strobe QE[35:0]
Data enable
Horizontal sync. signal
Vertical sync. signal
Indicates whether the current field is Even or Odd
for interlaced format
Type
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Pin No.
1-3, 7-10, 13-16,
108-111, 114-117,
120-123, 126-129,
132-135, 138-141,
144
5
19
20
21
22
Digital Audio Onput Pins
Pin Name Direction Description
XTALIN
Input
Crystal clock input (for Audio PLL)
XTALOUT Output Crystal clock output (for Audio PLL)
MCLK
Output Audio master clock
SCK_DCLK Output I2S serial clock output, doubles as DSD clock
WS_DR0
Output I2S word select output, doubles as DSD Serial Right CH0 data
output
I2S0_DL0 Output I2S serial data output, doubles as DSD Serial Left CH0 data
output
I2S1_DR1 Output I2S serial data output, doubles as DSD Serial Right CH1 data
output
I2S2_DL1 Output I2S serial data output, doubles as DSD Serial Left CH2 data
output
I2S3_DR2 Output I2S serial data output, doubles as DSD Serial Right CH2 data
output
SPDIF_DL2 Output S/PDIF audio output, doubles as DSD Serial Left CH2 data
output
MUTE_DR3 Output Mute output, doubles as DSD Serial Right CH3 data output
DSD_DL3 Output DSD Serial Left CH3 data output
Type
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Pin No.
95
94
89
86
85
LVTTL
81
LVTTL
82
LVTTL
83
LVTTL
84
LVTTL
78
LVTTL
LVTTL
75
77
www.ite.com.tw
Sep-2010 Rev:0.9 5/37

5 Page





IT6605 arduino
IT6605
Color
Space
RGB
YCbCr
Video
Format
4:4:4
4:4:4
4:2:2
Bus
Width
24
30/36
12/15/18
24
30/36
12/15/18
16/20/24
8/10/12
Hsync/
Vsync
Separate
Separate
Separate
Separate
Separate
Embedded
Separate
Embedded
480i
13.5
13.5
13.5
13.5
13.5
13.5
13.5
13.5
27
27
Output Pixel Clock Frequency (MHz)
480p
XGA
720p 1080i SXGA 1080p UXGA
27 65 74.25 74.25 108 148.5 162
27 65 74.25 74.25 108 148.5
27 65 74.25 74.25
27 65 74.25 74.25 108 148.5 162
27 65 74.25 74.25 108 148.5
27 65 74.25 74.25
27
74.25 74.25
148.5
27
74.25 74.25
148.5
54 148.5 148.5
54 148.5 148.5
Table 1. Output video formats supported by the IT6605
Notes:
1. Table cells that are left blanks are those format combinations that are not supported by the IT6605.
2. Output channel number is defined by the way the three color components (either R, G & B or Y, Cb & Cr) are
arranged. Refer to Video Data Bus Mappings for better understanding.
3. Embedded sync signals are defined by CCIR-656 standard, using SAV/EAV sequences of FF, 00, 00, XY.
4. The lowest TMDS clock frequency specified by the HDMI standard is 25MHz for 640X480@60Hz.
Supported 3D Formats
The IT6605 supports all the HDMI 1.4a 3D mandatory formats and all the primary 3D formats including
1920x1080P@50Hz -- Top-and-Bottom
[email protected]/60Hz -- Top-and-Bottom
[email protected]/30Hz -- Framing Packing, Top-and-Bottom
[email protected]/24Hz -- Framing Packing, Side-by-Side ( Half ), Top-and-Bottom
1920x1080i@50Hz – Frame Packing, Side-by-Side ( Half )
[email protected]/60Hz – Frame Packing, Side-by-Side ( Half )
1280x [email protected]/30Hz -- Framing Packing
1280x [email protected]/24Hz -- Framing Packing
1280x 720P@50Hz -- Framing Packing, Side-by-Side ( Half ), Top-and-Bottom
1280x [email protected]/60Hz -- Framing Packing, Side-by-Side ( Half ), Top-and-Bottom
Audio Clock Recovery and Data Processing
The audio processing block in the HDMI Sink is crucial to the system performance since human
hearing is susceptive to audio imperfection. The IT6605 prides itself in outstanding audio recovery
performances. In addition, the audio clock recovery PLL uses an external crystal reference so as to
provide stable and reliable audio clocks for all audio output formats.
www.ite.com.tw
Sep-2010 Rev:0.9 11/37

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