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(A82DL16x2T) Stacked Multi-Chip Package (MCP) Flash Memory and SRAM



AMIC Technology 로고
AMIC Technology
A82DL1622T 데이터시트, 핀배열, 회로
A82DL16x2T(U) Series
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM,
A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only,
Simultaneous Operation Flash Memory and 2M (128Kx16 Bit) Static RAM
Preliminary
www.DataSheet4U.com
Document Title
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit
(2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash Memory and 2M
(128Kx16 Bit) Static RAM
Revision History
Rev. No.
0.0
0.1
History
Initial issue
Update Figure 23
Issue Date
March 25, 2005
May 17, 2005
Remark
Preliminary
PRELIMINARY (May, 2005, Version 0.1)
AMIC Technology, Corp.


A82DL1622T 데이터시트, 핀배열, 회로
A82DL16x2T(U) Series
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM,
A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only,
Simultaneous Operation Flash Memory and 2M (128Kx16 Bit) Static RAM
Preliminary
www.DataSheet4U.com
DISTINCTIVE CHARACTERISTICS
MCP Features
Single power supply operation 2.7 to 3.6 volt
High Performance
- Access time as fast as 70ns
Package 69-Ball TFBGA (8x11x1.4 mm)
Industrial operating temperature range: -40°C to 85°C
for –U; -25°C to 85°C for –I
Flash Features
ARCHITECTURAL ADVANTAGES
Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in other bank
- Zero latency between read and write operations
Multiple bank architectures
- Three devices available with different bank sizes (refer to
Table 2)
Package
- 69-Ball TFBGA (8x11x1.4 mm)
Top or bottom boot block
Manufactured on 0.18 µm process technology
- Compatible with AM42DL16x2D devices
Compatible with JEDEC standards
- Pinout and software compatible with single-power-supply
flash standard
PERFORMANCE CHARACTERISTICS
High performance
- Access time as fast as 70ns
- Program time: 7µs/word typical utilizing Accelerate
function
Ultra low power consumption (typical values)
- 2mA active read current at 1MHz
- 10mA active read current at 5MHz
- 200nA in standby or automatic sleep mode
Minimum 1 million write cycles guaranteed per sector
20 Year data retention at 125°C
- Reliable operation for the life of the system
SOFTWARE FEATURES
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
- Suspends erase operations to allow programming in
same bank
Data Polling and Toggle Bit
- Provides a software method of detecting the status of
program or erase cycles
Unlock Bypass Program command
- Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
Any combination of sectors can be erased
Ready/ Busy output (RY/BY )
- Hardware method for detecting program or erase cycle
completion
Hardware reset pin (RESET )
- Hardware method of resetting the internal state machine
to reading array data
WP /ACC input pin
- Write protect ( WP ) function allows protection of two
outermost boot sectors, regardless of sector protect
status
- Acceleration (ACC) function accelerates program timing
Sector protection
- Hardware method of locking a sector, either in-system or
using programming equipment, to prevent any program
or erase operation within that sector
- Temporary Sector Unprotect allows changing data in
protected sectors in-system
LP SRAM Features
Power supply range: 2.7V to 3.6V
Access times: 70 ns (max.)
Current:
Very low power version: Operating: 35mA(max.)
Standby: 10uA (max.)
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Output enable and two chips enable inputs for easy
application
Data retention voltage: 2.0V (min.)
PRELIMINARY (May, 2005, Version 0.1)
1
AMIC Technology, Corp.




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A82DL1622T ram

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