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74HCT4051-Q100 반도체 회로 부품 판매점

8-channel analog multiplexer/demultiplexer



NXP Semiconductors 로고
NXP Semiconductors
74HCT4051-Q100 데이터시트, 핀배열, 회로
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
Rev. 2 — 8 October 2012
Product data sheet
1. General description
The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance
with JEDEC standard no. 7A.
The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog
multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable
input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z).
With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2.
With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4051-Q100 and 4.5 V to 5.5 V for
74HCT4051-Q100. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC
as a positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0 V. For
operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide analog input voltage range from 5 V to +5 V
Low ON resistance:
80 (typical) at VCC VEE = 4.5 V
70 (typical) at VCC VEE = 6.0 V
60 (typical) at VCC VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with 5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
CDM AEC-Q100-011 revision B exceeds 1000 V
Multiple package options


74HCT4051-Q100 데이터시트, 핀배열, 회로
NXP Semiconductors
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74HC4051D-Q100
74HCT4051D-Q100
40 C to +125 C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74HC4051PW-Q100 40 C to +125 C
74HCT4051PW-Q100
TSSOP16 plastic thin shrink small outline package; 16
leads; body width 4.4 mm
74HC4051BQ-Q100 40 C to +125 C
74HCT4051BQ-Q100
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16
terminals; body 2.5 3.5 0.85 mm
Version
SOT109-1
SOT403-1
SOT763-1
74HC_HCT4051_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 8 October 2012
© NXP B.V. 2012. All rights reserved.
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74HCT4051-Q100 multiplexer

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8-channel analog multiplexer/demultiplexer - NXP Semiconductors