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PDF ICS83052I Data sheet ( Hoja de datos )

Número de pieza ICS83052I
Descripción SINGLE-ENDED MULTIPLEXER
Fabricantes Integrated Circuit Systems 
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Integrated
Circuit
Systems, Inc.
ICS83052I
2:1, SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VDDO
Power
Output supply pin.
2
GND
Power
Power supply ground.
3, 6 CLK1, CLK0 Input Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
4
5
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7
VDD
OE
SEL0
Power
Input
Input
Pullup
Pulldown
Core supply pin.
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
Clock select input. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
8
Q Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CPD
Power Dissipation Capacitance
(per output)
ROUT
Output Impedance
Test Conditions
VDDO = 3.465V
VDDO = 2.625V
VDDO = 1.89V
Minimum
Typical
4
51
51
18
19
19
15
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
Control Inputs
SEL0
0
1
Input Selected to Q
CLK0
CLK1
83052AGI
www.icst.com/products/hiperclocks.html
2
REV. A AUGUST 2, 2005

1 page




ICS83052I pdf
Integrated
Circuit
Systems, Inc.
ICS83052I
2:1, SINGLE-ENDED MULTIPLEXER
TABLE 5D. AC CHARACTERISTICS, VDD = VDDO = 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum
fMAX Output Frequency
tpLH
Propagation Delay, Low to High;
NOTE 1
tpHL
Propagation Delay, High to Low;
NOTE 1
250
2.2 2.7 3.2
2.2 2.7 3.2
tsk(i)
Input Skew; NOTE 4
28 123
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Part-to-Part Skew; NOTE 2, 4
400
Buffer Additive Phase Jitter, RMS;
155.52MHz,
tjit
refer to Additive Phase Jitter section,
Integration Range:
NOTE 3
12kHz - 20MHz
0.22
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
300
45
700
55
MUXISOLATION MUX Isolation
45
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
NOTE 3: Driving only one input clock.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ns
ps
ps
ps
ps
%
dB
TABLE 5E. AC CHARACTERISTICS, VDD = 2.5V ± 5%, VDDO = 1.8V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
tpLH
tpHL
tsk(i)
Output Frequency
Propagation Delay, Low to High;
NOTE 1
Propagation Delay, High to Low;
NOTE 1
Input Skew; NOTE 4
250 MHz
2.1 3.1 4.1 ns
2.1 3.1 4.2 ns
19 73 ps
tsk(pp)
tjit
tR / tF
odc
Part-to-Part Skew; NOTE 2, 4
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter section,
NOTE 3
Output Rise/Fall Time
Output Duty Cycle
155.52MHz,
Integration Range:
12kHz - 20MHz
20% to 80%
350 ps
0.19 ps
350 850 ps
45 55 %
MUXISOLATION MUX Isolation
45
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
NOTE 3: Driving only one input clock.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
dB
83052AGI
www.icst.com/products/hiperclocks.html
6
REV. A AUGUST 2, 2005

5 Page





ICS83052I arduino
Integrated
Circuit
Systems, Inc.
ICS83052I
2:1, SINGLE-ENDED MULTIPLEXER
TABLE 8. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging Temperature
ICS83052AGI
052AI
8 lead TSSOP
tube
-40°C to 85°C
ICS83052AGIT
052AI
8 lead TSSOP
2500 tape & reel
-40°C to 85°C
ICS83052AGILF
TBD
8 lead "Lead-Free" TSSOP
tube
-40°C to 85°C
ICS83052AGILFT
TBD
8 lead "Lead-Free" TSSOP
2500 tape & reel
-40°C to 85°C
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
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The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
83052AGI
www.icst.com/products/hiperclocks.html
REV. A AUGUST 2, 2005
12

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