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August 1998
54AC139 • 54ACT139
Dual 1-of-4 Decoder/Demultiplexer
General Description
The ’AC/’ACT139 is a high-speed, dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each accepting two inputs and providing four
mutually-exclusive active-LOW outputs. Each decoder has
an active-LOW Enable input which can be used as a data in-
put for a 4-output demultiplexer. Each half of the ’AC/
’ACT139 can be used as a function generator providing all
four minterms of two variables.
n Multifunction capability
n Two completely independent 1-of-4 decoders
n Active LOW mutually exclusive outputs
n Outputs source/sink 24 mA
n ’ACT139 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’AC139: 5962-87623
— ’ACT139: 5962-87553
Features
n ICC reduced by 50%
Logic Symbols
IEEE/IEC
DS100269-8
DS100269-1
Pin Names
A0, A1
E
O0– O3
DS100269-2
Description
Address Inputs
Enable Inputs
Outputs
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© 1998 National Semiconductor Corporation DS100269
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Connection Diagrams
Pin Assignment
for DIP and Flatpak
can be used as the data input for a 4-output demultiplexer
application. Each half of the ’AC/’ACT139 generates all four
minterms of two variables. These four minterms are useful in
some applications, replacing multiple gate functions as
shown in , and thereby reducing the number of packages re-
quired in a logic network.
DS100269-3
Pin Assignment
for LCC
DS100269-4
Functional Description
The ’AC/’ACT139 is a high-speed dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each of which accepts two binary weighted inputs (A0–A1)
and provides four mutually exclusive active-LOW outputs
(O0–O3). Each decoder has an active-LOW enable (E).
When E is HIGH all outputs are forced HIGH. The enable
DS100269-6
FIGURE 1. Gate Functions (Each Half)
Truth Table
Inputs
Outputs
E A0 A1 O0 O1 O2 O3
HX X H H H H
LL L L H H H
LH L H L H H
LL H H H L H
LH H H H H L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
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