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54F157A 반도체 회로 부품 판매점

Quad 2-Input Multiplexer



National Semiconductor 로고
National Semiconductor
54F157A 데이터시트, 핀배열, 회로
November 1994
54F 74F157A
Quad 2-Input Multiplexer
General Description
The ’F157A is a high-speed quad 2-input multiplexer Four
bits of data from two sources can be selected using the
common Select and Enable inputs The four outputs present
the selected data in the true (non-inverted) form The
’F157A can also be used to generate any four of the 16
different functions to two variables
Features
Y Guaranteed 4000V minimum ESD protection
Commercial
74F157APC
74F157ASC (Note 1)
74F157ASJ (Note 1)
Military
54F157ADM (Note 2)
54F157AFM (Note 2)
54F157ALM (Note 2)
Package
Number
N16E
J16A
M16A
M16D
W16A
E20A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
Pin Assignment
for LCC
IEEE IEC
TL F 9483–3
TL F 9483 – 1
TL F 9483 – 2
TL F 9483–5
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9483
www.DataSheet4U.com
RRD-B30M75 Printed in U S A
www.DataSheet4U.com


54F157A 데이터시트, 핀배열, 회로
Unit Loading Fan Out
Pin Names
Description
I0a – I0d
I1a – I1d
E
S
Za – Zd
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input (Active LOW)
Select Input
Outputs
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
10 10
50 33 3
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
Functional Description
The ’F157A is a quad 2-input multiplexer It selects four bits
of data from two sources under the control of a common
Select input (S) The Enable input (E) is active LOW When
E is HIGH all of the outputs (Z) are forced LOW regardless
of all other inputs The ’F157A is the logic implementation of
a 4-pole 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select in-
put The logic equations for the outputs are shown below
Zn e E  (I1n S a I0n S)
A common use of the ’F157A is the moving of data from two
groups of registers to four common output busses The par-
ticular register from which the data comes is determined by
the state of the Select input A less obvious use is as a
function generator The ’F157A can generate any four of the
Logic Diagram
16 different functions of two variables with one variable
common This is useful for implementing highly irregular
logic
Truth Table
Inputs
E S I0
HXX
L HX
L HX
LLL
L LH
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Output
I1 Z
XL
LL
HH
XL
XH
TL F 9483 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2




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54F157A multiplexer

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