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74F711A 반도체 회로 부품 판매점

Multiplexers



Philips 로고
Philips
74F711A 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74F711A, 74F711-1, 74F712A, 74F712-1
Multiplexers
Product specification
IC15 Data Handbook
1990 Dec 13
Philips
Semiconductors


74F711A 데이터시트, 핀배열, 회로
Philips Semiconductors
Multiplexers
Product specification
74F711A/74F711–1/
74F712A/74F712–1
74F711A Quint 2-to-1 Data Selector Multiplexer (3-State)
74F711-1 Quint 2-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance (3-State)
74F712A Quint 3-to-1 Data Selector Multiplexer
74F712-1 Quint 3-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance
FEATURES for 74F711A/74F711-1
Consists of five 2-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
Output inverting/non-inverting option
30W termination impedance on each output – 74F711-1
Outputs sink 64mA (74F711A only)
FEATURES for 74F712A/74F712-1
Consists of five 3-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
30W termination impedance on each output – 74F712-1
Outputs sink 64mA (74F712A only)
To improve speed and noise immunity, VCC and GND side pins are
used.
The 74F712A/74F712-1 consist of five 3-to1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F712A has two select (S0, S1) inputs to
determine which set of five inputs will be propagated to the five
outputs. The outputs source 15mA and sink 64mA. The 74F712-1 is
the same as the 74F712A except that it has a 30W termination
impedance on each output to reduce line noise and the outputs sink
5mA.
TYPE
TYPICAL
PROPAGATION DELAY
74F711A
74F711-1
74F712A
74F712-1
6.0ns
6.5ns
6.5ns
6.5ns
TYPICAL SUPPLY
CURRENT
(TOTAL)
30mA
29mA
25mA
25mA
ORDERING INFORMATION
DESCRIPTION
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F711A has a common select (S) input, an
Output Enable (OE) input and an Output Inverting (INV) input to
control the 3-State outputs. The outputs source 15mA and sink
64mA. The 74F711-1 is the same as the 74F711A except that is has
a 30W termination impedance on each output to reduce line noise
and the 3-State outputs sink 5mA.
When the inverting input (INV) is Low, the input data path is
inverted.
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ± 10%
Tamb = 0° C to +70°C
20-Pin Plastic DIP N74F711AN, N74F711-1N
24-Pin Plastic Slim N74F712AN, N74F712-1N
DIP (300 mil)
20-Pin Plastic SOL N74F711AD, N74F711-1D
24-Pin Plastic SOL N74F712AD, N74F712-1D
PKG DWG #
SOT146-1
SOT222-1
SOT163-1
SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
Dna, Dnb
Data inputs
1.0/0.066
S Select input
1.0/0.033
74F711A/
74F711-1
OE
INV
Output Enable input (active Low)
Output inverting input (active Low)
1.0/0.033
1.0/0.033
Q0 - Q4
Data outputs for 74F711A
750/106.7
Q0 - Q4
Data outputs for 74F711-1
750/8.33
Dna, Dnb, Dnc
Data inputs
1.0/0.066
74F712A/
74F712-1
S0, S1
Q0 - Q4
Select inputs
Data outputs for 74F712A
1.0/0.033
750/106.7
Q0 - Q4
Data outputs for 74F712-1
750/8.33
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
20µA/40µA
20µA/20µA
20µA/20µA
20µA/20µA
15mA/64mA
15mA/5mA
20µA/40µA
20µA/20µA
15mA/64mA
15mA/5mA
1990 Dec 13
2 853-1368 01258




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74F711A multiplexer

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