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PDF 74VHC4052 Data sheet ( Hoja de datos )

Número de pieza 74VHC4052
Descripción 8-Channel Analog Multiplexer . Dual 4-Channel Analog Multiplexer . Triple 2-Channel Analog Multiplexer
Fabricantes Fairchild Semiconductor 
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No Preview Available ! 74VHC4052 Hoja de datos, Descripción, Manual

April 1994
Revised April 1999
74VHC4051 • 74VHC4052 • 74VHC4053
8-Channel Analog Multiplexer • Dual 4-Channel Analog
Multiplexer • Triple 2-Channel Analog Multiplexer
General Description
These multiplexers are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low “on” resistance and low “off” leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Also these
switches contain linearization circuitry which lowers the
“on” resistance and increases switch linearity. These
devices allow control of up to ±6V (peak) analog signals
with digital control signals of 0 to 6V. Three supply pins are
provided for VCC, ground, and VEE. This enables the con-
nection of 0–5V logic signals when VCC = 5V and an analog
input range of ±5V when VEE = 5V. All three devices also
have an inhibit control which when high will disable all
switches to their off state. All analog inputs and outputs
and digital inputs are protected from electrostatic damage
by diodes to VCC and ground.
VHC4051: This device connects together the outputs of 8
switches, thus achieving an 8 channel Multiplexer. The
binary code placed on the A, B, and C select lines deter-
mines which one of the eight switches is “on”, and con-
nects one of the eight inputs to the common output.
VHC4052: This device connects together the outputs of 4
switches in two sets, thus achieving a pair of 4-channel
multiplexers. The binary code placed on the A, and B
select lines determine which switch in each 4 channel sec-
tion is “on”, connecting one of the four inputs in each sec-
tion to its common output. This enables the implementation
of a 4-channel differential multiplexer.
VHC4053: This device contains 6 switches whose outputs
are connected together in pairs, thus implementing a triple
2 channel multiplexer, or the equivalent of 3 single-pole-
double throw configurations. Each of the A, B, or C select
lines independently controls one pair of switches, selecting
one of the two switches to be “on”.
Features
s Wide analog input voltage range: ±6V
s Low “on” resistance: 50 typ. (VCC–VEE = 4.5V)
30 typ. (VCC–VEE = 9V)
s Logic level translation to enable 5V logic with ±5V ana-
log signals
s Low quiescent current: 80 µA maximum
s Matched switch characteristic
s Pin and function compatible with the 74HC4051/ 4052/
4053
Ordering Code:
Order Number Package Number
Package Description
74VHC4051M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4051WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4051MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4051N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74VHC4052M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4052WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4052MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4052N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74VHC4053M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4053WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4053MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4053N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation DS011674.prf
www.fairchildsemi.com

1 page




74VHC4052 pdf
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VEE
VCC
TA = 25°C TA = −40 to 85°C Units
Typ Guaranteed Limits
VIH Minimum HIGH Level
Input Voltage
2.0V
4.5V
1.5
3.15
1.5
3.15
V
V
6.0V
4.2 4.2 V
VIL Maximum LOW Level
Input Voltage
2.0V
4.5V
0.5
1.35
0.5
1.35
V
V
6.0V
1.8 1.8 V
RON Maximum “ON” Resistance
(Note 5)
VINH = VIL, IS = 2.0 mA
VIS = VCC to VEE
(Figure 1)
GND
4.5V
6.0V
4.5V
4.5V
6.0V
40
30
20
160
120
100
200
150
125
VINH = VIL, IS = 2.0 mA
VIS = VCC or VEE
(Figure 1)
GND
GND
4.5V
2.0V
4.5V
4.5V
100
40
20
230
110
90
280
140
120
6.0V
6.0V
15
80
100
RON Maximum “ON” Resistance
Matching
VINH = VIL
VIS = VCC to GND
GND
4.5V
6.0V
4.5V
4.5V
6.0V
10
5
5
20
10
10
25
15
12
IN Maximum Control
VIN = VCC or GND
Input Current
VCC = 2 6V
ICC Maximum Quiescent
VIN = VCC or GND
Supply Current
IOUT = 0 µA
IIZ Maximum Switch “OFF”
VOS = VCC or VEE
Leakage Current
VIS = VEE or VCC
(Switch Input)
VINH = VIH (Figure 2)
IIZ Maximum Switch “ON”
VIS = VCC to VEE
Leakage Current
VHC4051 VINH = VIL
(Figure 3)
GND
6.0V
GND
6.0V
GND
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
±.05
4
8
±60
±100
±0.1
±0.2
±0.5
40
80
±300
±500
±1.0
±2.0
µA
µA
µA
nA
nA
µA
µA
VIS = VCC to VEE
VHC4052 VINH = VIL
(Figure 3)
GND
6.0V
6.0V
6.0V
±0.050
±0.1
±0.5
±1.0
µA
µA
VIS = VCC to VEE
VHC4053 VINH = VIL
(Figure 3)
GND
6.0V
6.0V
6.0V
±0.05
±0.5
±0.5
±0.5
µA
µA
IIZ Maximum Switch
VOS = VCC or VEE
GND
6.0V
±0.1
±1.0
µA
“OFF” Leakage
VHC4051 VIS = VEE or VCC
6.0V
6.0V
±0.2
±2.0
µA
Current (Common Pin)
VINH = VIH
VOS = VCC or VEE
GND
6.0V
±0.05
±0.5
µA
VHC4052 VIS = VEE or VCC
6.0V
6.0V
±0.1
±1.0
µA
VINH = VIH
VOS = VCC or VEE
GND
6.0V
±0.05
±0.5
µA
VHC4053 VIS = VEE or VCC
6.0V
6.0V
±0.05
±0.5
µA
VINH = VIH
Note 4: For a power supply of 5V ±10% the worst case on resistances (RON) occurs for VHC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occur
for CMOS at the higher voltage and so the 5.5V values should be used.
Note 5: At supply voltages (VCC–VEE) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
Note 6: Adjust 0 dB for f = 1 kHz (Null R1/RON Attenuation).
5 www.fairchildsemi.com

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74VHC4052 arduino
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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