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74LV157 반도체 회로 부품 판매점

Quad 2-input multiplexer



Philips 로고
Philips
74LV157 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74LV157
Quad 2-input multiplexer
Product specification
Supersedes data of 1997 May 15
IC24 Data Handbook
Philips
Semiconductors
1998 Apr 30


74LV157 데이터시트, 핀배열, 회로
Philips Semiconductors
Quad 2-input multiplexer
Product specification
74LV157
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
Tamb = 25°C
Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,
Tamb = 25°C
Output capability: standard
ICC category: MSI
DESCRIPTION
The 74LV157 is a low-voltage CMOS device and is pin and function
compatible with 74HC/HCT157.
The 74LV157 is a quad 2-input multiplexer which selects 4 bits of data
from two sources under the control of a common data select input (S).
The four outputs present the selected data in the true (non-inverted)
form. The enable input (E) is active LOW. When E is HIGH, all of the
outputs (1Y to 4Y) are forced LOW regardless of all other input
conditions.
Moving the data from two groups of registers to four common output
buses is a common use of the 74LV157. The state of the common
data select input (S) determines the particular register from which
the data comes. It can also be used as function generator.
The device is useful for implementing highly irregular logic by
generating any four of the 16 different functions of two variables with
one variable common.
The 74LV157 is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determined by the logic
levels applied to S.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
nl0, nl1, to nY
E to nY
S to nY
CL = 15 pF;
VCC = 3.3 V
CI Input capacitance
CPD Power dissipation capacitance per gate VI = GND to VCC1
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL × VCC2 × fo) = sum of the outputs.
TYPICAL
10
11
12
3.5
70
ORDERING INFORMATION
PACKAGES
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +125°C
74LV157 N
–40°C to +125°C
74LV157 D
–40°C to +125°C
74LV157 DB
–40°C to +125°C
74LV157 PW
NORTH AMERICA
74LV157 N
74LV157 D
74LV157 DB
74LV157PW DH
UNIT
ns
pF
pF
PKG. DWG. #
SOT38-4
SOT109-1
SOT338-1
SOT403-1
1998 Apr 30
2 853–1920 19318




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74LV157 multiplexer

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