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Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74LCX257M 데이터시트, 핀배열, 회로
May 1995
Revised September 2000
74LCX257
Low Voltage Quad 2-Input Multiplexer
with 5V Tolerant Inputs and Outputs
General Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs
present the selected data in true (non inverted) form. The
outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE)
input, allowing the outputs to interface directly with bus-ori-
ented systems.
The 74LCX257 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 6.0 ns tPD max (VCC = 3.3V, In Zn), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX257M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74LCX257SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX257MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
S
OE
I0aI0d
I1aI1d
ZaZd
Description
Common Data Select Input
3-STATE Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
3-STATE Multiplexer Outputs
© 2000 Fairchild Semiconductor Corporation DS012466
www.fairchildsemi.com


74LCX257M 데이터시트, 핀배열, 회로
Functional Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I0x inputs are selected and when Select
is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (non
inverted) form. The device is the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Za = OE (11a S + I0a S)
Zb = OE (11b S + I0b S)
Zc = OE (11c S + I0c S)
Zd = OE (11d S + I0d S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maxi-
mum ratings. Designers should ensure the Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Truth Table
Output
Enable
Select
Input
OE S
HX
LH
LH
LL
LL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Data
Inputs
I0 I1
XX
XL
XH
LX
HX
Outputs
Z
Z
L
H
L
H
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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