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Fairchild Semiconductor |
November 1988
Revised November 1999
74AC153 • 74ACT153
Dual 4-Input Multiplexer
General Description
The AC/ACT153 is a high-speed dual 4-input multiplexer
with common select inputs and individual enable inputs for
each section. It can select two lines of data from four
sources. The two buffered outputs present data in the true
(non-inverted) form. In addition to multiplexer operation,
the AC/ACT153 can act as a function generator and gener-
ate any two functions of three variables.
Features
s ICC reduced by 50%
s Outputs source/sink 24 mA
s ACT153 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC153SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74AC153SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC153MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC153PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74ACT153SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74ACT153MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I0a–I3a
I0b–I3b
S0, S1
Ea
Eb
Za
Zb
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input
Side B Enable Input
Side A Output
Side B Output
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009928
www.fairchildsemi.com
Functional Description
Truth Table
The AC/ACT153 is a dual 4-input multiplexer. It can select
two bits of data from up to four sources under the control of
the common Select inputs (S0, S1). The two 4-input multi-
plexer circuits have individual active-LOW Enables (Ea, Eb)
which can be used to strobe the outputs independently.
When the Enables (Ea, Eb) are HIGH, the corresponding
outputs Za, Zb) are forced LOW. The AC/ACT153 is the
logic implementation of a 2-pole, 4-position switch, where
the position of the switch is determined by the logic levels
supplied to the Select inputs. The logic equations for the
outputs are shown below.
Select
Inputs
Inputs (a or b)
Output
S0 S1
E
I0
I1
I2
I3
XXHXXXX
L L L LXXX
L L LHXXX
H L L X LXX
Z
L
L
H
L
H L L X HX X
H
Za = Ea • (I0a • S1 • S0 + I1a • S1 • S0 +
I2a • S1 • S0 + I3a • S1 • S0)
Zb = Eb • (I0b • S1 • S0 + I1b • S1 • S0 +
I2b • S1 • S0 + I3b • S1 • S0)
LHL
LHL
HH L
HH L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
X
X
X
X
XL X
XH X
XX L
XX H
L
H
L
H
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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