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74ACTQ153PC 반도체 회로 부품 판매점

Quiet Series Dual 4-Input Multiplexer



Fairchild Semiconductor 로고
Fairchild Semiconductor
74ACTQ153PC 데이터시트, 핀배열, 회로
July 1990
Revised May 1999
74ACTQ153
Quiet Series Dual 4-Input Multiplexer
General Description
The ACTQ153 is a high-speed dual 4-input multiplexer with
common select inputs and individual enable inputs for each
section. It can select two lines of data from four sources.
The two buffered outputs present data in the true (non-
inverted) form. In addition to multiplexer operation, the
ACTQ153 can act as a function generator and generate
any two functions of three variables.
Features
s Outputs source/sink 24 mA
s ACTQ153 has TTL-compatible inputs
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Improved latch-up immunity
Ordering Code:
Order Number Package Number
Package Description
74ACTQ153SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ153PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I0a - 13a
I0b - 13b
S0, S1
Ea
Eb
Za
Zb
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input
Side B Enable Input
Side A Output
Side B Output
FACT, FACT Quiet Series, and GTOare trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010244.prf
www.fairchildsemi.com


74ACTQ153PC 데이터시트, 핀배열, 회로
Functional Description
The ACTQ153 is a dual 4-input multiplexer. It can select
two bits of data from up to four sources under the control of
the common Select inputs (S0, S1). The two 4-input multi-
plexer circuits have individual active-LOW Enables (Ea, Eb)
which can be used to strobe the outputs independently.
When the Enables (Ea, Eb) are HIGH, the corresponding
outputs (Az, Zb) are forced LOW. The ACTQ153 is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels sup-
plied to the Select inputs. The logic equations for the out-
puts are shown below.
Za = Ea • (I0a • S1 • S0 + I1a • S1 • S0 +
I2a • S1 •S0 + I3a • S1 • S0)
Zb = Eb • (I0b • S1 • S0 • I1b • S1 • S0 +
I2b • S1 • S0 +I3b • S1 • S0)
Logic Diagram
Truth Table
Select
Inputs
S0 S1
XX
LL
LL
HL
E
H
L
L
L
HLL
LHL
LHL
HHL
HHL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Inputs (a or b)
I0 I1 I2
XXX
L XX
HXX
XLX
XHX
XXL
XXH
XXX
XXX
Outputs
I3 Z
XL
XL
XH
XL
XH
XL
XH
LL
HH
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74ACTQ153PC multiplexer

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74ACTQ153PC

Quiet Series Dual 4-Input Multiplexer - Fairchild Semiconductor