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74ACT253SJ 반도체 회로 부품 판매점

Dual 4-Input Multiplexer with 3-STATE Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74ACT253SJ 데이터시트, 핀배열, 회로
November 1988
Revised October 2000
74AC253 74ACT253
Dual 4-Input Multiplexer with 3-STATE Outputs
General Description
The AC/ACT253 is a dual 4-input multiplexer with 3-STATE
outputs. It can select two bits of data from four sources
using common select inputs. The outputs may be individu-
ally switched to a high impedance state with a HIGH on the
respective Output Enable (OE) inputs, allowing the outputs
to interface directly with bus oriented systems.
Features
s ICC and IOZ reduced by 50%
s Multifunction capability
s Non inverting 3-STATE outputs
s Outputs source/sink 24 mA
s ACT253 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC253SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74AC253SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC253PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACT253SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74ACT253SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT253MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT253PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available Tape and Reel. Specify by appending suffix letterw“Xwwt.oDathtaeSohredeet4riUng.cocmode.
Logic Diagrams
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I0aI3a
I0bI3b
S0, S1
OEa
OEb
Za, Zb
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Output Enable Input
Side B Output Enable Input
3-STATE Outputs
FACTis a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS009946
www.fairchildsemi.com


74ACT253SJ 데이터시트, 핀배열, 회로
Functional Description
The AC/ACT253 contains two identical 4-input multiplexers
with 3-STATE outputs. They select two bits from four
sources selected by common Select inputs (S0, S1). The
4-input multiplexers have individual Output Enable (OEa,
OEb) inputs which, when HIGH, force the outputs to a high
impedance (High Z) state. This device is the logic imple-
mentation of a 2-pole, 4-position switch, where the position
of the switch is determined by the logic levels supplied to
the two select inputs. The logic equations for the outputs
are shown:
Za = OEa (I0a S1 S0 + I1a S1 S0 +
I2a S1 S0 + I3a S1 S0)
Zb = OEb (I0b S1 S0 + I1b S1 S0 +
I2b S1 S0 + I3b S1 S0)
If the outputs of 3-STATE devices are tied together, all but
one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings.
Designers should ensure that Output Enable signals to 3-
STATE devices whose outputs are tied together are
designed so that there is no overlap.
Truth Table
Select
Inputs
Data Inputs
Output
Outputs
Enable
S0 S1 I0 I1 I2 I3 OE
X X XXXX H
L L LXXX L
L L HXXX L
H L XLXX L
H L XHXX L
L H XXLX L
L H XXHX L
H H XXXL L
H H XXXH L
Address Inputs S0 and S1 are common to both sections.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Z
Z
L
H
L
H
L
H
L
H
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74ACT253SC

Dual 4-Input Multiplexer with 3-STATE Outputs - Fairchild Semiconductor



74ACT253SJ

Dual 4-Input Multiplexer with 3-STATE Outputs - Fairchild Semiconductor