파트넘버.co.kr 74LV138PW 데이터시트 PDF


74LV138PW 반도체 회로 부품 판매점

3-to-8 line decoder/demultiplexer



NXP Semiconductors 로고
NXP Semiconductors
74LV138PW 데이터시트, 핀배열, 회로
74LV138
3-to-8 line decoder/demultiplexer; inverting
Rev. 4 — 4 March 2016
Product data sheet
1. General description
The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC138 and 74HCT138.
The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted
address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive
active LOW outputs (Y0 to Y7).
There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3).
Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the device to a 1-of-32
(5 lines to 32 lines) decoder with just four 74LV138 devices and one inverter. The
74LV138 can be used as an eight output demultiplexer by using one of the active LOW
enable inputs as the data input and the remaining enable inputs as strobes. Unused
enable inputs must be permanently tied to their appropriate active HIGH or LOW state.
2. Features and benefits
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C


74LV138PW 데이터시트, 핀배열, 회로
NXP Semiconductors
74LV138
3-to-8 line decoder/demultiplexer; inverting
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LV138D
40 C to +125 C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74LV138DB
40 C to +125 C SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74LV138PW
40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74LV138BQ
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1
4. Functional diagram



 (
 (
 (
Fig 1. Logic symbol
$ < 
$ < 
$ < 
< 
< 
< 
< 
< 
PQD
';  

 

*





 
 
  
 
 
D
Fig 2. IEC logic symbol
;<  

 

 

 
 
  
 

(1


PQD
E
Fig 3. Functional diagram
74LV138
Product data sheet
 $
 $
 $
WR
'(&2'(5
(1$%/(
(;,7,1*
 (
 (
 (
< 
< 
< 
< 
< 
< 
< 
< 
PQD
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 4 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 16




PDF 파일 내의 페이지 : 총 16 페이지

제조업체: NXP Semiconductors

( nxp )

74LV138PW multiplexer

데이터시트 다운로드
:

[ 74LV138PW.PDF ]

[ 74LV138PW 다른 제조사 검색 ]




국내 전력반도체 판매점


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877

[ 홈페이지 ]

IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈

( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )

전력반도체 문의 : 010-3582-2743



일반적인 전자부품 판매점


디바이스마트

IC114

엘레파츠

ICbanQ

Mouser Electronics

DigiKey Electronics

Element14


관련 데이터시트


74LV138PW

3-to-8 line decoder/demultiplexer - NXP Semiconductors