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Fairchild Semiconductor |
January 2010
FDZ192NZ
N-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
20 V, 5.3 A, 39 mΩ
Features
Max rDS(on) = 39 mΩ at VGS = 4.5 V, ID = 2.0 A
Max rDS(on) = 43 mΩ at VGS = 2.5 V, ID = 2.0 A
Max rDS(on) = 49 mΩ at VGS = 1.8 V, ID = 1.0 A
Max rDS(on) = 55 mΩ at VGS = 1.5 V, ID = 1.0 A
Occupies only 1.5 mm2 of PCB area.Less than 50% of the
area of 2 x 2 BGA
Ultra-thin package: less than 0.65 mm height when mounted
to PCB
HBM ESD protection level > 2200V (Note3)
RoHS Compliant
General Description
Designed on Fairchild's advanced 1.5 V PowerTrench® process
with state of the art "fine pitch" WLCSP packaging process, the
FDZ192NZ minimizes both PCB space and rDS(on). This
advanced WLCSP MOSFET embodies a breakthrough in
packaging technology which enables the device to combine
excellent thermal transfer characteristics, ultra-low profile
packaging, low gate charge, and low rDS(on).
Applications
Battery management
Load switch
Battery protection
PIN1
S
SG
DS
D
BOTTOM
TOP
WL-CSP 1x1.5 Thin
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
-Continuous
-Pulsed
TA = 25°C
Power Dissipation
TA = 25°C
Power Dissipation
TA = 25°C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
20
±8
5.3
15
1.9
0.9
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
65
133
°C/W
Device Marking
8
Device
FDZ192NZ
Package
WL-CSP 1x1.5 Thin
Reel Size
7”
Tape Width
8 mm
Quantity
5000 units
©2010 Fairchild Semiconductor Corporation
FDZ192NZ Rev.C1
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 µA, VGS = 0 V
ID = 250 µA, referenced to 25 °C
VDS = 16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
20
V
10 mV/°C
1 µA
±10 µA
On Characteristics
VGS(th)
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 µA
0.4 0.7 1.0
V
ID = 250 µA, referenced to 25 °C
-3 mV/°C
VGS = 4.5 V, ID = 2.0 A
VGS = 2.5 V, ID = 2.0 A
VGS = 1.8 V, ID = 1.0 A
VGS = 1.5 V, ID = 1.0 A
VGS = 4.5 V, ID = 2.0 A,
TJ =125 °C
VDS = 5 V, ID = 5.3 A
26 39
29 43
33 49 mΩ
38 55
31 47
36 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 10 V, VGS = 0 V,
f = 1 MHz
915 1220
145 195
100 150
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = 10 V, ID = 5.3 A,
VGS = 4.5 V, RGEN = 6 Ω
VGS = 0 V to 4.5 V VDD = 10 V,
ID = 5.3 A
6.5 13 ns
4 10 ns
50 80 ns
20 32 ns
12 17 nC
1.3 nC
2.3 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 1.1 A (Note 2)
IF = 5.3 A, di/dt = 100 A/µs
0.6 1.2
V
18 32 ns
4.6 10 nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 65 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 133 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
©2010 Fairchild Semiconductor Corporation
FDZ192NZ Rev.C1
2
www.fairchildsemi.com
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