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STMicroelectronics |
Features
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STD40N2LH5
STU40N2LH5
N-channel 25 V, 0.01 Ω, 40 A, DPAK, IPAK
STripFET™ V Power MOSFET
Preliminary Data
Type
STD40N2LH5
STU40N2LH5
VDSS
25 V
25 V
RDS(on) max
0.012 Ω
0.0126 Ω
ID
40 A
40 A
■ RDS(on) * Qg industry benchmark
■ Extremely low on-resistance RDS(on)
■ Very low switching gate charge
■ High avalanche ruggedness
■ Low gate drive power losses
Application
■ Switching applications
Description
This product utilizes the 5th generation of design
rules of ST’s proprietary STripFET™ technology.
The lowest available RDS(on)*Qg, in the standard
packages, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
3
1
DPAK
3
2
1
IPAK
Figure 1. Internal schematic diagram
Table 1. Device summary
Order codes
STD40N2LH5
STU40N2LH5
Marking
40N2LH5
40N2LH5
Package
DPAK
IPAK
Packaging
Tape and reel
Tube
September 2008
Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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Electrical ratings
1 Electrical ratings
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Table 2. Absolute maximum ratings
Symbol
Parameter
VDS
VGS
ID
ID
IDM (1)
PTOT
Drain-source voltage (VGS=0)
Gate-Source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Derating factor
EAS (2) Single pulse avalanche energy
Tj Operating junction temperature
Tstg Storage temperature
1. Pulse width limited by safe operating area
2. Starting Tj = 25 °C, ID = 24 A, VDD = 12 V
Table 3. Thermal resistance
Symbol
Parameter
Rthj-case Thermal resistance junction-case max
Rthj-amb Thermal resistance junction-case max
Tl Maximum lead temperature for soldering purpose
Value
25
± 22
40
28
160
35
0.23
TBD
-55 to 175
Value
4.3
100
275
Unit
V
V
A
A
A
W
W/°C
mJ
°C
Unit
°C/W
°C/W
°C
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