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PDF SUB70N03-09P Data sheet ( Hoja de datos )
| Número de pieza | SUB70N03-09P | |
| Descripción | N-Channel MOSFET | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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SPICE Device Model SUP/SUB70N03-09P
Vishay Siliconix
N-Channel 30-V (D-S), 175°C MOSFET PWM Optimized
CHARACTERISTICS
• N-Channel Vertical DMOS
• Macro Model (Model Subcircuit Schematic)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model schematic is extracted and optimized over the −55 to 125°C
temperature ranges under the pulsed 0-to-5V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to
model the gate charge characteristics while avoiding convergence
difficulties of the switched Cgd model. All model parameter values
are optimized to provide a best fit to the measured electrical data
and are not intended as an exact physical interpretation of the
device.
SUBCIRCUIT MODEL SCHEMATIC
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This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 71566
05-Nov-98
www.vishay.com
1
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| PDF Descargar | [ Datasheet SUB70N03-09P.PDF ] | |
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