STE40NK90ZD 반도체 회로 부품 판매점
N-CHANNEL Power MOSFET
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 ST Microelectronics |
STE40NK90ZD
N-CHANNEL 900V - 0.14Ω - 40 A ISOTOP
Super FREDMesh™ MOSFET
Table 1: General Features
TYPE
VDSS RDS(on)
ID
Pw
STE40NK90ZD 900 V < 0.18 Ω 40 A 600 W
s TYPICAL RDS(on) = 0.14 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperFREDMesh™ series is obtained
through an extreme optimization of ST’s well es-
tablished strip-based PowerMESH™ layout. In ad-
dition to pushing on-resistance significantly down,
special care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary MD-
mesh™ products.
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s IDEAL FOR WELDING EQUIPMENT
Figure 1: Package
ISOTOP
Figure 2: Internal Schematic Diagram
Table 2: Order Codes
SALES TYPE
STE40NK90ZD
MARKING
E40NK90ZD
PACKAGE
ISOTOP
PACKAGING
TUBE
December 2004
www.DataSheet4U.com
Rev. 4
1/10
STE40NK90ZD
Table 3: Absolute Maximum ratings
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (AC-RMS) from All Four
Terminals to External Heatsink
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD ≤ 40A, di/dt ≤ 500 A/µs, VDD ≤ V(BR)DSS.
Table 4: Thermal Data
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb Thermal Resistance Junction-ambient Max
Value
900
900
± 30
40
25
160
600
5
7
8
2500
- 65 to 150
0.2
40
Unit
V
V
V
A
A
A
W
W/°C
KV
V/ns
V
°C
°C/W
°C/W
Table 5: Avalanche Characteristics
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 35 V)
Max. Value
40
1.2
Unit
A
J
Table 6: Gate-Source Zener Diode
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STE40NK90ZD mosfet
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