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RF1S40N10LESM 반도체 회로 부품 판매점

40A/ 100V/ 0.040 Ohm/ Logic Level N-Channel Power MOSFETs



Intersil Corporation 로고
Intersil Corporation
RF1S40N10LESM 데이터시트, 핀배열, 회로
RFG40N10LE, RFP40N10LE, RF1S40N10LESM
Data Sheet
October 1999 File Number 4061.5
40A, 100V, 0.040 Ohm, Logic Level
N-Channel Power MOSFETs
These N-Channel enhancement mode power MOSFETs are
manufactured using the latest manufacturing process
technology. This process, which uses feature sizes
approaching those of LSI integrated circuits gives optimum
utilization of silicon, resulting in outstanding performance.
They were designed for use in applications such as
switching regulators, switching converters, motor drivers and
relay drivers. These transistors can be operated directly from
integrated circuits.
Formerly developmental type TA49163.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFG40N10LE
TO-247
FG40N10L
RFP40N10LE
TO-220AB
FP40N10L
RF1S40N10LESM TO-263AB
F40N10LE
NOTE: When ordering, use the entire part number. Add the suffix, 9A, to
obtain the TO-263AB variant in tape and reel, i.e. RF1S40N10LESM9A.
Packaging
DRAIN
(FLANGE)
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
Features
• 40A, 100V
• rDS(ON) = 0.040
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-220AB
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999


RF1S40N10LESM 데이터시트, 핀배열, 회로
RFG40N10LE, RFP40N10LE, RF1S40N10LESM
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
RFG40N10LE, RFP40N10LE,
RF1S40N10LESM
UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation (Figure
Derate Above 25oC . . .
1)
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PD
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Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
100
100
±10
40
Refer to Peak Current Curve
Refer to UIS Curve
150
1.00
-55 to 175
300
260
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
BVDSS
VGS(TH)
IDSS
IGSS
rDS(ON)
tON
td(ON)
tr
td(OFF)
tf
tOFF
Qg(TOT)
Qg(5)
Qg(TH)
ID = 250µA, VGS = 0V (Figure 13)
VGS = VDS, ID = 250µA (Figure 12)
VDS = 95V, VGS = 0V
VDS = 90V, VGS = 0V, TC = 150oC
VGS = ±10V
ID = 40A, VGS = 5V
VDD = 50V, ID = 40A, RL = 1.25,
VGS = 5V, RGS = 2.5
(Figures 10, 18, 19)
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 80V,
ID = 40A,
RL = 2.0
(Figures 20, 21)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction-to-Case
Thermal Resistance Junction-to-Ambient
CISS
COSS
CRSS
RθJC
RθJA
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 14)
All Packages
TO-247
TO-220AB and TO-263AB
MIN TYP
100 -
1-
--
--
--
--
--
- 22
- 140
- 70
- 65
--
- 145
- 85
-3
- 3000
- 500
- 200
--
--
--
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
Source to Drain Diode Voltage
VSD
ISD = 40A
--
Diode Reverse Recovery Time
trr ISD = 40A, dISD/dt = 100A/µs
--
NOTES:
2. Pulse test: pulse width 80µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
MAX
-
3
1
250
10
0.040
200
-
-
-
-
165
180
105
4
-
-
-
1.0
30
80
MAX
1.5
205
UNITS
V
V
µA
µA
µA
ns
ns
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
oC/W
oC/W
oC/W
UNITS
V
ns
2




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RF1S40N10LESM mosfet

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40A/ 100V/ 0.040 Ohm/ Logic Level N-Channel Power MOSFETs - Intersil Corporation