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RFD16N03L 반도체 회로 부품 판매점

16A/ 30V/ 0.025 Ohm/ Logic Level/ N-Channel Power MOSFETs



Intersil Corporation 로고
Intersil Corporation
RFD16N03L 데이터시트, 핀배열, 회로
Data Sheet
RFD16N03L, RFD16N03LSM
April 1999 File Number 4013.2
16A, 30V, 0.025 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-Channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI circuits, gives optimum
utilization of silicon, resulting in outstanding performance.
They were designed for use in applications such as
switching regulators, switching converters, motor drivers and
relay drivers. This performance is accomplished through a
special gate oxide design which provides full rated
conductance at gate bias in the 3V to 5V range, thereby
facilitating true on-off power control directly from logic level
(5V) integrated circuits.
Formerly developmental type TA49030.
Ordering InformationS
PART NUMBER
PACKAGE
BRAND
RFD16N03L
TO-251AA
16N03L
RFD16N03LSM
TO-252AA
16N03L
NOTE: When ordering, use the entire part number. Add the suffix 9A,
to obtain the TO-252AA variant in tape and reel, e.g. RFD16N03LSM9A.
Features
• 16A, 30V
• rDS(ON) = 0.025
• Temperature Compensating PSPICE™ Model
• Can be Driven Directly from CMOS, NMOS,
and TTL Circuits
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
DRAIN
GATE
SOURCE
Packaging
DRAIN
(FLANGE)
JEDEC TO-251AA
SOURCE
DRAIN
GATE
JEDEC TO-252AA
DRAIN
(FLANGE)
GATE
SOURCE
6-156
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999


RFD16N03L 데이터시트, 핀배열, 회로
RFD16N03L, RFD16N03LSM
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate Above 25oC (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
RFD16N03L, RFD16N03LSM
30
30
±10
16
Refer to Peak Current Curve
Figures 6, 16, 17
90
0.606
-55 to 175
300
260
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1. TJ = 25oC to 150oC.
LC-
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
SYMBOL
BVDSS
VGS(TH)
IDSS
IGSS
rDS(ON)
tON
td(ON)
tr
td(OFF)
tf
tOFF
Qg(TOT)
Qg(5)
Qg(TH)
TEST CONDITIONS
ID = 250µA, VGS = 0V (Figure 13)
VGS = VDS, ID = 250µA (Figure 12)
VDS = 30V,
VGS = 0V
TC = 25oC
TC = 150oC
VGS = ±10V
ID = 16A, VGS = 5V (Figure 11)
VDD = 15V, ID 16A,
RL = 0.93, VGS = 5V,
RGS = 5
(Figures 18, 19)
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 24V,
ID = 16A,
RL = 1.5
IG(REF) = 0.6mA
(Figures 15, 20, 21
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
CISS
COSS
CRSS
RθJC
RθJA
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 14)
Figure 3
TO-251 and TO-252
Source to Drain Diode Specifications
MIN TYP MAX UNITS
30 - - V
1- 2 V
- - 1 µA
- - 50 µA
-
-
±100
nA
- - 0.025
- - 120 ns
- 15 - ns
- 95 - ns
- 25 - ns
- 27 - ns
- - 80 ns
- 50 60 nC
- 30 36 nC
- 1.5 1.8 nC
- 1650
-
pF
- 575
-
pF
- 200
-
pF
-
-
1.65
oC/W
- - 100 oC/W
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
Source to Drain Diode Voltage
VSD
ISD = 16A
--
Diode Reverse Recovery Time
trr ISD = 16A, dISD/dt = 100A/µs
--
NOTES:
2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).
MAX
1.5
75
UNITS
V
ns
6-157




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RFD16N03L mosfet

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