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FDT3612 반도체 회로 부품 판매점

100V N-Channel PowerTrench MOSFET



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDT3612 데이터시트, 핀배열, 회로
March 2001
FDT3612
100V N-Channel PowerTrenchMOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications. The result is a MOSFET that is
easy and safer to drive (even at very high frequencies),
and DC/DC power supply designs with higher overall
efficiency.
Applications
DC/DC converter
Motor driving
Features
3.7 A, 100 V. RDS(ON) = 120 m@ VGS = 10 V
RDS(ON) = 130 m@ VGS = 6 V
Fast switching speed
Low gate charge (14nC typ)
High performance trench technology for extremely
low RDS(ON)
High power and current handling capability in a
widely used surface mount package
DD
DD
S
SOT-22 3
D
G
GDS
S
SOT-2 2 3 *
(J2 3 Z )
G
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
3612
FDT3612
13’’
Ratings
100
±20
3.7
20
3.0
1.3
1.1
–55 to +150
42
12
Tape width
12mm
S
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500 units
2001 Fairchild Semiconductor Corporation
FDT3612 Rev. C1 (W)


FDT3612 데이터시트, 핀배열, 회로
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings (Note 2)
WDSS
Drain-Source Avalanche Energy Single Pulse, VDD = 50 V, ID= 3.7 A
IAR Drain-Source Avalanche Current
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 80 V,
VGS = 20 V,
VGS = –20 V,
VGS = 0 V
VDS = 0 V
VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on) On–State Drain Current
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS = 10 V,
ID = 3.7 A
VGS = 6 V,
ID = 3.5 A
VGS = 10 V, ID = 3.7A, TJ = 125°C
VGS = 10 V,
VDS = 10 V
VDS = 10 V,
ID = 3.7 A
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 50 V,
f = 1.0 MHz
V GS = 0 V,
Switching Characteristics
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
(Note 2)
VDD = 50 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6
VDS = 50 V,
VGS = 10 V
ID = 3.7 A,
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = 2.5 A (Note 2)
100
2
10
90 mJ
3.7 A
V
106 mV/°C
10
100
–100
µA
nA
nA
2.5 4
V
–6 mV/°C
88 120
94 130
170 245
11
m
A
S
632 pF
40 pF
20 pF
8.5 17
24
23 37
4.5 9
14 20
2.4
3.8
ns
ns
ns
ns
nC
nC
nC
2.5
0.75 1.2
A
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 42°C/W when
mounted on a 1in2
pad of 2 oz copper
b) 95°C/W when
mounted on a .0066
in2 pad of 2 oz
copper
c) 110°C/W when mounted on a
minimum pad.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDT3612 Rev. C1 (W)




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FDT3612 mosfet

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FDT3612

100V N-Channel PowerTrench MOSFET - Fairchild Semiconductor