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FDS6675 반도체 회로 부품 판매점

Single P-Channel/ Logic Level/ PowerTrenchTM MOSFET



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDS6675 데이터시트, 핀배열, 회로
October 1998
FDS6675
Single P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description
This P-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize
the on-state resistance and yet maintain low gate charge
for superior switching performance.
These devices are well suited for notebook computer
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
Features
-11 A, -30 V. RDS(ON) = 0.014 @ VGS = -10 V,
RDS(ON) = 0.020 @ VGS = -4.5 V.
Low gate charge (30nC typical).
High performance trench technology for extremely low
RDS(ON).
High power and current handling capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D
D
D
D
FD66S75
SO-8
pin 1
S
G
S
S
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
TA = 25oC unless otherwise noted
(Note 1a)
PD Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1998 Fairchild Semiconductor Corporation
FDS6675
-30
±20
-11
-50
2.5
1.2
1
-55 to 150
50
25
Units
V
V
A
W
°C
°C/W
°C/W
FDS6675 Rev.C1


FDS6675 데이터시트, 핀배열, 회로
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
OFF CHARACTERISTICS
Min Typ
Max Units
BVDSS
Drain-Source Breakdown Voltage
BVDSS/TJ Breakdown Voltage Temp. Coefficient
VGS = 0 V, I D = -250 µA
ID = -250 µA, Referenced to 25 oC
-30
-22
V
mV/oC
IDSS Zero Gate Voltage Drain Current
VDS = -24 V, VGS = 0 V
-1 µA
TJ = 55°C
-10 µA
IGSSF Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
100 nA
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS = -20 V, VDS = 0 V
-100 nA
VGS(th)
VGS(th)/TJ
RDS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
Static Drain-Source On-Resistance
VDS = VGS, ID = -250 µA
ID = 250 µA, Referenced to 25 oC
VGS = -10 V, I D = -11 A
-1 -1.7
-3
V
4.3 mV/oC
0.011 0.014
ID(ON) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
TJ =125°C
0.016 0.023
VGS = -4.5 V, I D = -9 A
0.015 0.02
VGS = -10 V, VDS = -5 V
-50
VDS = -10 V, I D = -11 A
32
A
S
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
3000
870
360
pF
pF
pF
tD(on) Turn - On Delay Time
VDS = -15 V, I D = -1 A
tr Turn - On Rise Time
VGEN = -10 V, RGEN = 6
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
VDS = -15 V, I D = -11 A,
Qgs Gate-Source Charge
VGS= -5 V
Qgd Gate-Drain Charge
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
12 22
16 27
50 80
100 140
30 42
9
11
ns
ns
ns
ns
nC
nC
nC
IS
VSD
Notes:
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -2.1 A (Note 2)
-0.72
-2.1
-1.2
A
V
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is
guaranteed by design while RθCA is determined by the user's board design.
a. 50OC/W on a 1 in2 pad
of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
b. 105OC/W on a 0.04 in2
pad of 2oz copper.
c. 125OC/W on a 0.006 in2 pad
of 2oz copper.
FDS6675 Rev.C1




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FDS6675 mosfet

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