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FDS6612A 반도체 회로 부품 판매점

PowerTrench MOSFET



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDS6612A 데이터시트, 핀배열, 회로
FDS6612A
Single N-Channel, Logic-Level, PowerTrench® MOSFET
April 2007
tm
General Description
This N-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
8.4 A, 30 V.
RDS(ON) = 22 m@ VGS = 10 V
RDS(ON) = 30 m@ VGS = 4.5 V
Fast switching speed
Low gate charge
High performance trench technology for extremely
low RDS(ON)
High power and current handling capability
DD DDDD
DD
SO-8
Pin 1 SO-8
SS SS SS GG
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
EAS Single Pulse Avalanche Energy
(Note 3)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1b)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6612A
FDS6612A
13’’
5
6
7
8
Ratings
30
±20
8.4
40
2.5
1.0
24
–55 to +150
50
125
25
Tape width
12mm
4
3
2
1
Units
V
V
A
W
mJ
°C
°C/W
Quantity
2500 units
©2007 Fairchild Semiconductor Corporation
FDS6612A Rev D1 (W)


FDS6612A 데이터시트, 핀배열, 회로
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
TJ
IDSS
IGSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
VGS = 0 V,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
VDS = 24 V, VGS = 0 V, TJ=55°C
VGS = ±20 V, VDS = 0 V
30
V
26 mV/°C
1
10
±100
µA
µA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
VDS = VGS,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 8.4 A
VGS = 4.5 V, ID = 7.2 A
VGS= 10 V, ID = 8.4 A, TJ=125°C
1 1.9
–4.4
19
24
25
3V
mV/°C
22 m
30
37
ID(on)
On–State Drain Current
gFS Forward Transconductance
VGS = 10 V,
VDS = 15 V,
VDS = 5 V
ID = 8.4 A
20
30
A
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
VDS = 15 V,
f = 1.0 MHz
V GS = 0 V,
Crss Reverse Transfer Capacitance
RG Gate Resistance
VGS = 15 mV, f = 1.0 MHz
560 pF
140 pF
55 pF
2.5
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDD = 15 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6
VDS = 15 V,
VGS = 5 V
ID = 8.4 A,
7 14
5 10
22 35
36
5.4 7.6
1.7
1.9
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 2.1 A (Note 2)
trr
Qrr
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
IF = 8.4 A, diF/dt = 100 A/µs
2.1
0.77 1.2
19
9
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50°C/W when mounted
on a 1in2 pad of 2 oz
copper
2 Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3 Starting TJ = 25°C, L = 1mH, IAS = 7A, VDD = 27V, VGS = 10V
b) 125°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
FDS6612A Rev D1 (W)




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FDS6612A mosfet

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