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FDS6162N3 반도체 회로 부품 판매점

20V N-Channel PowerTrench MOSFET



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDS6162N3 데이터시트, 핀배열, 회로
May 2003
FDS6162N3
20V N-Channel PowerTrenchMOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an
extremely low RDS(ON) in a small package.
Applications
Synchronous rectifier
DC/DC converter
Features
21 A, 20 V
RDS(ON) = 4.5 m@ VGS = 4.5 V
RDS(ON) = 6.0 m@ VGS = 2.5 V
High performance trench technology for extremely
low RDS(ON)
High power and current handling capability
Fast switching
FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size
Bottom-side
5 Drain Contact
6
7
8
4
3
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
TJ, TSTG
Power Dissipation
(Note 1a)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6162N3
FDS6162N3
13’’
2002 Fairchild Semiconductor Corporation
Ratings
20
± 12
21
60
3.0
–55 to +150
40
0.5
Tape width
12mm
Units
V
V
A
W
°C
°C/W
Quantity
2500 units
FDS6162N3 Rev B2 (W)


FDS6162N3 데이터시트, 핀배열, 회로
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown
Voltage
BVDSS
TJ
Breakdown Voltage Temperature
Coefficient
IDSS Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 16 V,
VGS = 12 V,
VGS = –12 V ,
VGS = 0 V
VDS = 0 V
VDS = 0 V
20 V
13 mV/°C
1
100
–100
µA
nA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
gFS Forward Transconductance
VDS = VGS,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
0.6 0.9 1.5
V
–4 mV/°C
VGS = 4.5 V, ID = 21 A
VGS = 2.5 V, ID = 18 A
VGS = 4.5 V, ID = 21 A, TJ = 125°C
VDS = 5 V,
ID = 21 A
3.3 4.5 m
4.3 6.0
4.8 7.2
119 S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
RG Gate Resistance
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDS = 10 V,
f = 1.0 MHz
V GS = 0 V,
VGS = 15 mV, f = 1.0 MHz
VDD = 10 V,
VGS = 4.5 V,
ID = 1 A,
RGEN = 6
VDS = 10 V,
VGS = 4.5 V
ID = 21 A,
5521
1473
706
1.3
pF
pF
pF
20
25
85
55
52
9
14.5
32
40
136
88
73
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = 2.5 A (Note 2)
trr
Qrr
Notes:
Diode Reverse Recovery Time IF = 21 A,
Diode Reverse Recovery Charge diF/dt = 100 A/µs
2.5
0.6 1.2
A
V
42 nS
52 nC
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 40°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 85°C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6162N3 Rev B2 (W)




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