파트넘버.co.kr HUF75531SK8 데이터시트 PDF


HUF75531SK8 반도체 회로 부품 판매점

6A/ 80V/ 0.030 Ohm/ N-Channel/ UltraFET Power MOSFET



Intersil Corporation 로고
Intersil Corporation
HUF75531SK8 데이터시트, 핀배열, 회로
TM
Data Sheet
6A, 80V, 0.030 Ohm, N-Channel,
UltraFET Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
Symbol
SOURCE (1)
SOURCE (2)
SOURCE (3)
GATE (4)
DRAIN (8)
DRAIN (7)
DRAIN (6)
DRAIN (5)
HUF75531SK8
April 2000
File Number 4848
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.030Ω, VGS = 10V
• Simulation Models
- Temperature Compensated PSPICE™ and SABER©
Electrical Models
- Spice and SABER© Thermal Impedance Models
- www.intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75531SK8
MS-012AA
75531SK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75531SK8T.
Absolute Maximum Ratings TA = 25oC, Unless Otherwise Specified
HUF75531SK8
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous
Continuous
(TA=
(TA=
2150o0CoC, V, VGGSS==101V0V) )(F(Figiugruere2)2).
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. ID
. ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
80
80
±20
6
4
Figure 4
Figures 6, 14, 15
V
V
V
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
..
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief TB370 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 10 second.
3. 152oC/W measured using FR-4 board with 0.054 in2 (34.8 mm2) copper pad at 1000 seconds
4. 189oC/W measured using FR-4 board with 0.0115 in2 (7.42 mm2) copper pad at 1000 seconds
2.5
20
-55 to 150
300
260
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1 CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000


HUF75531SK8 데이터시트, 핀배열, 회로
HUF75531SK8
Electrical Specifications
TA = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
BVDSS
IDSS
IGSS
ID = 250µA, VGS = 0V (Figure 11)
VDS = 75V, VGS = 0V
VDS = 70V, VGS = 0V, TA = 150oC
VGS = ±20V
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to
Ambient
VGS(TH)
rDS(ON)
VGS = VDS, ID = 250µA (Figure 10)
ID = 6A, VGS = 10V (Figure 9)
RθJA
Pad Area = 0.76 in2 (490.3 mm2) (Note 2)
Pad Area = 0.054 in2 (34.8 mm2) (Note 3)
Pad Area = 0.0115 in2 (7.42 mm2)(Note 4)
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Turn-Off Time
tOFF
GATE CHARGE SPECIFICATIONS
VDD = 40V, ID = 6A
VGS = 10V,
RGS = 6.8
(Figures 18, 19)
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain "Miller" Charge
CAPACITANCE SPECIFICATIONS
Qg(TOT)
Qg(10)
Qg(TH)
Qgs
Qgd
VGS = 0V to 20V
VGS = 0V to 10V
VGS = 0V to 2V
VDD = 40V,
ID = 6A,
Ig(REF) = 1.0mA
(Figures 13, 16, 17)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
COSS
CRSS
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
VSD
Reverse Recovery Time
Reverse Recovered Charge
trr
QRR
TEST CONDITIONS
ISD = 6A
ISD = 4A
ISD = 6A, dISD/dt = 100A/µs
ISD = 6A, dISD/dt = 100A/µs
MIN TYP MAX UNITS
80 - - V
- - 1 µA
- - 250 µA
- - ±100 nA
2 - 4V
-
0.025 0.030
- - 50 oC/W
- - 152 oC/W
189 oC/W
- - 55 ns
- 10.5 -
ns
- 25 - ns
- 49 - ns
- 29 - ns
- - 115 ns
- 68 82 nC
- 37 45 nC
- 2.4 2.9 nC
- 4.8 - nC
- 14 - nC
- 1210 -
- 385 -
- 115 -
pF
pF
pF
MIN TYP MAX UNITS
- - 1.25 V
- - 1.00 V
- - 105 ns
- - 325 nC
2




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HUF75531SK8 mosfet

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