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Fairchild Semiconductor |
Data Sheet
HUF75321D3, HUF75321D3S
June 1999 File Number 4351.5
20A, 55V, 0.036 Ohm, N-Channel UltraFET
Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA75321.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75321D3
TO-251AA
75321D
HUF75321D3S
TO-252AA
75321D
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-251AA variant in tape and reel, e.g., HUF75321D3ST.
Packaging
JEDEC TO-251AA
Features
• 20A, 55V
• Simulation Models
- Temperature Compensating PSPICE® and SABER©
Models
- Thermal Impedance SPICE and SABER Models
Available on the WEB at:
www.semi.Intersil.com/families/models.htm
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-252AA
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN
(FLANGE)
58 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
HUF75321D3, HUF75321D3S
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
55 V
55 V
±20 V
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
20
Figure 4
Figures 6, 14, 15
93
0.625
-55 to 175
300
260
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
BVDSS
IDSS
IGSS
ID = 250µA, VGS = 0V (Figure 11)
VDS = 50V, VGS = 0V
VDS = 45V, VGS = 0V, TC = 150oC
VGS = ±20V
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
VGS(TH)
rDS(ON)
VGS = VDS, ID = 250µA (Figure 10)
ID = 20A, VGS = 10V (Figure 9)
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to Ambient
RθJA
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Turn-Off Time
tOFF
GATE CHARGE SPECIFICATIONS
(Figure 3)
TO-251, TO-252
VDD = 30V, ID ≅ 20A,
RL = 1.5Ω, VGS = 10V,
RGS = 25Ω
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Reverse Transfer Capacitance
Qg(TOT)
Qg(10)
Qg(TH)
Qgs
Qgd
VGS = 0V to 20V
VGS = 0V to 10V
VGS = 0V to 2V
VDD = 30V,
ID ≅ 20A,
RL = 1.5Ω
Ig(REF) = 1.0mA
(Figure 13)
MIN TYP MAX UNITS
55 - - V
- - 1 µA
- - 250 µA
-
-
±100
nA
2-4V
- 0.030 0.036 Ω
- - 1.6 oC/W
- - 100 oC/W
- - 100 ns
- 11 -
ns
- 55 -
ns
- 47 -
ns
- 66 -
ns
- - 170 ns
- 36 44 nC
- 21 26 nC
-
1.3 1.6
nC
- 3 - nC
- 9 - nC
59
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