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PDF HUF75229P3 Data sheet ( Hoja de datos )

Número de pieza HUF75229P3
Descripción 44A/ 50V/ 0.022 Ohm/ N-Channel UltraFET Power MOSFET
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
HUF75229P3
June 1998
File Number 4536.1
44A, 50V, 0.022 Ohm, N-Channel UltraFET
Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75229P3
TO-220AB
75229P
NOTE: When ordering use the entire part number.
Features
• 44A, 50V
Low On-Resistance, rDS(ON) = 0.022
Temperature Compensating PSPICE Model
Thermal Impedance SPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
DRAIN
(FLANGE)
JEDEC TO-220AB
SOURCE
DRAIN
GATE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
UltraFET is a trademark of Intersil Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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HUF75229P3 pdf
HUF75229P3
Typical Performance Curves (Continued)
1500
1200
900
VGS = 0V, f = 1MHz
CISS
10
VDD = 30V
8
6
600
300
0
0
COSS
CRSS
10 20 30 40
VDS, DRAIN TO SOURCE VOLTAGE (V)
50
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 44A
ID = 27A
ID = 11A
0
0 5 10 15 20 25 30 35
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
VGS
IG(REF)
VDS
RL
DUT
+
VDD
-
FIGURE 16. GATE CHARGE TEST CIRCUIT
VDD
VDS
Qg(TOT)
VGS
VGS = 2V
0
Ig(REF)
0
Qg(10)
Qg(TH)
VGS = 10V
VGS = 20V
FIGURE 17. GATE CHARGE WAVEFORM
5

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