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G4812SS 반도체 회로 부품 판매점

N-CHANNEL ENHANCEMENT MODE MOSFET



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G4812SS 데이터시트, 핀배열, 회로
DMG4812SSS
N-CHANNEL ENHANCEMENT MODE MOSFET WITH SCHOTTKY DIODE
Product Summary
V(BR)DSS
30V
RDS(on)
15m@ VGS= 10V
18.5m@ VGS= 4.5V
ID max
TA = +25°C
10.7A
9.6A
Description
This new generation MOSFET has been designed to minimize the on-
state resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
Features
DIOFET utilizes a unique patented process to monolithically
integrate a MOSFET and a Schottky in a single die to deliver:
Low RDS(ON) - minimizes conduction losses
Low VSD - reducing the losses due to body diode
conduction
Low Qrr - lower Qrr of the integrated Schottky reduces body
diode switching losses
Low gate capacitance (Qg/Qgs) ratio – reduces risk of
shoot-through or cross conduction currents at high
frequencies
Avalanche rugged – IAR and EAR rated
ESD Protected
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Qualified to AEC-Q101 Standards for High Reliability
Applications
DC-DC Converters
Power management functions
ESD PROTECTED
Top View
Mechanical Data
Case: SO-8
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminal Connections: See Diagram Below
Weight: 0.072 grams (approximate)
SD
D
SD
S DG
GD
Top View
Internal Schematic
S
Equivalent circuit
Ordering Information (Note 4)
Notes:
Part Number
DMG4812SSS-13
Case
SO-8
Packaging
2500 / Tape & Reel
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free. 
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4. For packaging details, go to our website at http://www.diodes.com/products/packages.html.
Marking Information
85
G4812SS
YY WW
14
Chengdu A/T Site
DMG4812SSS
Document number: DS35071 Rev. 3 - 2
85
G4812SS
YY WW
14
Shanghai A/T Site
= Manufacturer’s Marking
G4812SS = Product Type Marking Code
YYWW = Date Code Marking
YY or YY = Year (ex: 13 = 2013)
WW = Week (01 - 53)
YY = Date Code Marking for SAT (Shanghai Assembly/ Test site)
YY = Date Code Marking for CAT (Chengdu Assembly/ Test site)
1 of 6
www.diodes.com
October 2013
© Diodes Incorporated


G4812SS 데이터시트, 핀배열, 회로
Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Characteristic
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Note 5) VGS = 10V
Steady
State
Continuous Drain Current (Note 6) VGS = 10V
t 10 sec
Continuous Drain Current (Note 6) VGS = 4.5V
t 10 sec
Pulsed Drain Current (Note 7)
Avalanche Current (Notes 7 & 8)
Repetitive Avalanche Energy (Notes 7 & 8) L = 0.3mH
TA = +25°C
TA = +85°C
TA = +25°C
TA = +85°C
TA = +25°C
TA = +85°C
Symbol
VDSS
VGSS
ID
ID
ID
IDM
IAR
EAR
DMG4812SSS
Value
30
±12
8
6.4
10.7
8.6
9.6
7.7
45
13
25.4
Unit
V
V
A
A
A
A
A
mJ
Thermal Characteristics
Characteristic
Power Dissipation (Note 5)
Thermal Resistance, Junction to Ambient @TA = +25°C (Note 5)
Power Dissipation (Note 6)
Thermal Resistance, Junction to Ambient @TA = +25°C (Note 6)
Operating and Storage Temperature Range
Symbol
PD
RθJA
PD
RθJA
TJ, TSTG
Value
1.54
81
2.8
45
-55 to +150
Unit
W
°C/W
W
°C/W
°C
Electrical Characteristics (@TA = +25°C, unless otherwise specified.)
Characteristic
OFF CHARACTERISTICS (Note 9)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
ON CHARACTERISTICS (Note 9)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transfer Admittance
Diode Forward Voltage
Maximum Body-Diode + Schottky Continuous Current
DYNAMIC CHARACTERISTICS (Note 10)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge VGS = 4.5V
Total Gate Charge VGS = 10V
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Symbol
BVDSS
IDSS
IGSS
VGS(th)
RDS (ON)
|Yfs|
VSD
IS
Ciss
Coss
Crss
Rg
Qg
Qg
Qgs
Qgd
tD(on)
tr
tD(off)
tf
Min
30
1.0
0.54
Typ Max
——
— 150
— ±100
11
16.5
20
0.36
2.3
15
18.5
0.5
5
1849
158
123
2.0
18.5
43
4.7
4.0
6.62
8.73
36.41
4.69
4.0
Unit Test Condition
V VGS = 0V, ID = 1mA
A VDS = 30V, VGS = 0V
nA VGS = ±12V, VDS = 0V
V VDS = VGS, ID = 250μA
m
VGS = 10V, ID = 10.7A
VGS = 4.5V, ID = 9.6A
S VDS = 5V, ID = 10.7A
V VGS = 0V, IS = 1A
A-
pF
pF
pF
VDS =15V, VGS = 0V,
f = 1.0MHz
VDS =0V, VGS = 0V, f = 1MHz
nC
nC VDS = 15V, VGS = 10V,
nC ID = 9.6A
nC
ns
ns VGS = 10V, VDS = 15V,
ns RG = 3, RL = 15, ID = 1A
ns
Notes:
5. Device mounted on FR-4 PCB with minimum recommended pad layout. The value in any given application depends on the user’s specific board design.
6. Device mounted on 1” x 1” FR-4 PCB with high coverage 1 oz. Copper, single sided, device is measured at t 10 sec.
7. Repetitive rating, pulse width limited by junction temperature.
8. IAR and EAR rating are based on low frequency and duty cycles to keep TJ = +25°C
9. Short duration pulse test used to minimize self-heating effect.
10. Guaranteed by design. Not subject to production testing.
DMG4812SSS
Document number: DS35071 Rev. 3 - 2
2 of 6
www.diodes.com
October 2013
© Diodes Incorporated




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N-CHANNEL ENHANCEMENT MODE MOSFET - Diodes