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Fairchild Semiconductor |
FDT86106LZ
N-Channel PowerTrench® MOSFET
100 V, 3.2 A, 108 mΩ
Features
General Description
January 2013
Max rDS(on) = 108 mΩ at VGS = 10 V, ID = 3.2 A
Max rDS(on) = 153 mΩ at VGS = 4.5 V, ID = 2.7 A
High performance trench technology for extremely low rDS(on)
High power and current handling capability in a widely used
surface mount package
HBM ESD protection level > 3 KV typical (Note 4)
100% UIL tested
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced Power Trench® process
that has been special tailored to minimize the on-state resistance
and yet maintain superior switching performance. G-S zener
has been added to enhance ESD voltage level.
Application
DC - DC Conversion
RoHS Compliant
D
SOT-223
S
D
G
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TA = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
(Note 1b)
Ratings
100
±20
3.2
12
12
2.2
1.0
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
12
55
°C/W
Device Marking
86106LZ
Device
FDT86106LZ
Package
SOT-223
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
©2013 Fairchild Semiconductor Corporation
FDT86106LZ Rev.C2
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
100
V
ID = 250 μA, referenced to 25 °C
71 mV/°C
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1 μA
±10 μA
On Characteristics (Note 2)
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 μA
1.0 1.5 2.2
V
ID = 250 μA, referenced to 25 °C
-5 mV/°C
VGS = 10 V, ID = 3.2 A
VGS = 4.5 V, ID = 2.7 A
VGS = 10 V, ID = 3.2 A,
TJ = 125 °C
VDS = 10 V, ID = 3.2 A
80 108
100 153 mΩ
140 189
8S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 50 V, VGS = 0 V,
f = 1 MHz
234 315
46 65
3.1 5
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = 50 V, ID = 3.2 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 5 V VDD = 50 V,
ID = 3.2 A
3.8 10 ns
1.3 10 ns
10 20 ns
1.5 10 ns
4.3 7 nC
2.4 4 nC
0.7 nC
0.9 nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 3.2 A
VGS = 0 V, IS = 1 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = 3.2 A, di/dt = 100 A/μs
0.86 1.3
0.77 1.2
31 49
21 34
V
ns
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a) 55 °C/W when mounted on a
1 in2 pad of 2 oz copper
b) 118 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25°C, L = 1 mH, IAS = 5 A, VDD = 90 V, VGS = 10 V.
4. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDT86106LZ Rev.C2
2
www.fairchildsemi.com
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