K3060 반도체 회로 부품 판매점
N-CHANNEL POWER MOS FET
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 NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3060
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The 2SK3060 is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
• Low on-state resistance
RDS(on)1 = 13 mΩ MAX. (VGS = 10 V, ID = 35 A)
RDS(on)2 = 20 mΩ MAX. (VGS = 4.0 V, ID = 35 A)
• Low Ciss: Ciss = 2400 pF TYP.
• Built-in gate protection diode
ORDERING INFORMATION
PART NUMBER
PACKAGE
2SK3060
TO-220AB
2SK3060-S
TO-262
2SK3060-ZJ
2SK3060-Z
TO-263
TO-220SMDNote
Note This package is produced only in Japan.
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to Source Voltage (VGS = 0 V)
VDSS
Gate to Source Voltage (VDS = 0 V)
VGSS(AC)
Gate to Source Voltage (VDS = 0 V)
VGSS(DC)
Drain Current (DC)
Drain Current (Pulse) Note1
ID(DC)
ID(pulse)
Total Power Dissipation (TC = 25°C)
PT
Total Power Dissipation (TA = 25°C)
PT
Channel Temperature
Tch
Storage Temperature
Single Avalanche Current Note2
Single Avalanche Energy Note2
Tstg
IAS
EAS
60
±20
+20, −10
±70
±210
70
1.5
150
–55 to +150
35
122.5
V
V
V
A
A
W
W
°C
°C
A
mJ
(TO-220AB)
(TO-262)
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
5 2. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 V → 0 V
(TO-263, TO-220SMD)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13099EJ3V0DS00 (3rd edition)
Date Published April 2001 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1997,2000
2SK3060
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain to Source On-state Resistance
RDS(on)1 VGS = 10 V, ID = 35 A
RDS(on)2 VGS = 4.0 V, ID = 35 A
Gate to Source Cut-off Voltage
VGS(off) VDS = 10 V, ID = 1 mA
Forward Transfer Admittance
| yfs | VDS = 10 V, ID = 35 A
Drain Leakage Current
Gate to Source Leakage Current
IDSS VDS = 60 V, VGS = 0 V
IGSS VGS = ±20 V, VDS = 0 V
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Ciss
Coss
Crss
VDS = 10 V
VGS = 0 V
f = 1 MHz
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
td(on)
tr
td(off)
tf
ID = 35 A
VGS = 10 V
VDD = 30 V
RG = 10 Ω
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
QGS
QGD
ID = 70 A
VDD = 48 V
VGS = 10 V
Body Diode Forward Voltage
VF(S-D) IF = 70 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
trr IF = 70 A, VGS = 0 V
Qrr di/dt = 100 A / µs
MIN. TYP. MAX. UNIT
11 13 mΩ
16 20 mΩ
1.0 1.5 2.0 V
15 50
S
10 µA
±10 µA
2400
pF
700 pF
280 pF
30 ns
600 ns
140 ns
450 ns
50 nC
7.5 nC
18 nC
1.0 V
55 ns
75 nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
50 Ω
L
VDD
ID
VDD
IAS BVDSS
VDS
Starting Tch
5 TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 µs
Duty Cycle ≤ 1%
RL VGS
VGS
Wave Form
0 10%
90%
VDD
ID 90%
ID 0 10%
Wave Form
ID
90%
10%
td(on) tr td(off) tf
ton toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D13099EJ3V0DS
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K3060 mosfet
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