R8A66161SP 반도체 회로 부품 판매점
16-BIT LED DRIVER
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 Renesas Technology |
R8A66161DD/SP
16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
REJ03F0262-0100
Rev. 1.00
Jan. 16. 2008
DESCRIPTION
R8A66161 is a LED array driver having a 16-bit serial input and parallel output shift register function with
direct coupled reset input and output latch function.
This product guarantees the output current of 24mA (Vcc =5V case) which is sufficient for anode common
LED drive, capable of following 16-bits continuously at the same time. Parallel output is open drain output.
In addition, as this product has been designed in complete CMOS, power consumption can be greatly
reduced when compared with conventional BIPOLAR or Bi-CMOS products. Furthermore, pin layout ensures
the realization of an easy printed circuit. R8A66161 is the succession product of M66311.
www.DataSheetF4UE.cAomTURES
● Anode common LED drive
● VCC 5V or 3.3V single power supply
● High output current: all parallel outputs QA~ QP IOL=24mA (at VCC =5.0V) IOL=12mA (at VCC =3.3V)
simultaneous lighting available
● Low power dissipation: 100uW/package (max) (VCC=5.0V, Ta=25 , quiescent state)
● High noise margin: Schmitt input circuit provides responsiveness to a long line length
● Equipped with direct-coupled reset
● Open drain output: (except serial data output SQP)
● Wide operating temperature range: Ta=-40oC~+85oC
● Pin layout facilitates printed circuit wiring. (This layout facilitates cascade connection and LED connection)
APPLICATION
● LED array drive, The various LED display modules
● PPC, Printer, VCR, Mini-compo, Button-Telephone etc. All of LED display equipment
BLOCK DIAGRAM
LOGIC DIAGRAM
PARALLEL DATA OUTPUTS
QA QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP
1 2 24 23 22 21 20 19 18 17 16 15 14 13 11 12
SERIAL
DATA
OUTPUT
SQP Vcc
10 3
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
54
OE A
ENABLE SERIAL
INPUT DATA
INPUT
DATA signal
OE signal
PARALLEL
DATA
OUTPUTS
QA QP
OUTPUT FORMAT
SERIAL
DATA
OUTPUT
SQP
8 76 9
CKS R CKL GND
SHIFT DIRECTLATCH
CLOCK RESET CLOCK
INPUT INPUT INPUT
REJ03F0262-0100 Rev.1.00 Jan.16.2008
page 1 of 7
R8A66161DD/SP
PIN CONFIGURATION ( TOP VIEW )
www.DataSheet4U.com
PARALLEL DATA
OUTPUTS
QA
QB
VCC
1 QA QC 24
2 QB QD 23
3 QE 22
SERIAL DATA INPUT A
4A
QF 21
ENABLE INPUT
OE 5 OE QG 20
LATCH CLOCK INPUT CKL 6 CKL QH 19
DIRECT RESET INPUT R
7R
QI 18
SHIFT CLOCK INPUT CKS 8 CKS QJ 17
GND 9
QK 16
SERIAL DATA OUTPUT SQP 10 SQP QL 15
PARALLEL DATA
OUTPUTS
QO 11 QO QM 14
QP 12 QP QN 13
QC
QD
QE
QF
QG
QH
QI
QJ
QK
QL
QM
QN
PARALLEL DATA
OUTPUTS
FUNCTIONAL DESCRIPTION
As R8A66161 uses silicon gate CMOS process. It realizes high-speed and high-output currents sufficient for
LED drive while maintaining low power consumption and allowance for high noises.
Each bit of a shift register consists of two flip-flop having independent clocks for shifting and latching.
As for clock input, shift clock input CKS and latch clock input CKL are independent from each other, shift and
latch operations being made when “L” changes to “H”.
Serial data input A is the data input of the first-step shift register and the signal of A shifts shifting registers
one by one when a pulse is impressed to CKS. When A is “H”, the signal of “L” shifts.
When the pulse is impressed to CKL, the contents of the shifting register at that time are stored in a latching
register, and they appear in the parallel data outputs from QA ~ QP.
Outputs QA ~ QP are open drain outputs.
To extend the number of bits, use the serial data output SQP which shows the output of the shifting register
of the 16th bit.
When reset input R is changed to “L”, QA ~ QP and SQP are reset. In this case, shifting and latching register
are set.
If “H” is impressed to output enable input OE, QA ~ QP reaches the high impedance state, but SQP does not
reach the high impedance state. Furthermore, change in OE does not affect shift operation.
FUNCTION TABLE (Note: 1)
Operation mode
Reset
Shift
Latch
operation
Shift t1
Latch t2
Shift t1
Latch t2
Input
Parallel data output
Serial
data
output
Remarks
R CKS CKL A OE QA QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP SQP
L XX XX Z Z Z Z Z Z Z Z Z Z Z Z Z ZZ ZL
H X H L QA0 QB0 QC0 QD0 QE0 QF0 QG0 QH0 QI0 QJ0 QK0 QL0 QM0 QN0 QO0 QP0 qO0 Output
Lighting
HX
X L L qA0 qB0 qC0 qD0 qE0 qF0 qG0 qH0 qI 0 qJ 0 qK0 qL0 qM0 qN0 qO0 qO0 H
H X L L QA0 QB0 QC0 QD0 QE0 QF0 QG0 QH0 QI0 QJ0 QK0 QL0 QM0 QN0 QO0 QP0 qO0 Output
Lights-out
HX
X L Z qA0 qB0 qC0 qD0 qE0 qF0 qG0 qH0 qI 0 qJ 0 qK0 qL0 qM0 qN0 qO0 qO0 L
Output disable
X X X X H Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z qP
Note1: : Change from low-level to high-level
Q0 : Output state Q before CKL changed
X : Irrelevant
q0 : Contents of shift register before CKS changed
q : Contents of shift register
t1, t2 : t2 is set after t1 is set
Z : High impedance
REJ03F0262-0100 Rev.1.00 Jan.16.2008
page 2 of 7
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R8A66161SP led
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