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PDF N121I1-L03 Data sheet ( Hoja de datos )

Número de pieza N121I1-L03
Descripción TFT LCD Module
Fabricantes CMI MEI 
Logotipo CMI MEI Logotipo



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N121I1-L03 pdf
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Storage Temperature
Operating Ambient Temperature
Shock (Non-Operating)
Vibration (Non-Operating)
Symbol
TST
TOP
SNOP
VNOP
Value
Min. Max.
-20 +60
0 +50
- (200)
- (1.5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Relative Humidity
100
90
80
60
Operating Range
40
20
5 Storage Range
-40 -20
0 20
Temperature (ºC)
40
Issued Date: Jul.30, 2004
Model No.: N121I1 -L03
Tentative
Unit Note
ºC (1)
ºC (1), (2)
G (3), (5)
G (4), (5)
60 80
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
Note (3) 3ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 500Hz, 0.5 Hr/cycle, 0.5hr each X, Y, Z,
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
5 / 23
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification. Version 0.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com

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N121I1-L03 arduino
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Issued Date: Jul.30, 2004
Model No.: N121I1 -L03
Tentative
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol
Description
1 VDD Power Supply +3.3 V
2 VDD Power Supply +3.3 V
3 GND Ground
4 GND Ground
5 Rxin0- LVDS Differential Data Input
6 Rxin0+ LVDS Differential Data Input
7 GND Ground
8 Rxin1- LVDS Differential Data Input
9 Rxin1+ LVDS Differential Data Input
10 GND Ground
11 Rxin2- LVDS Differential Data Input
12 Rxin2+ LVDS Differential Data Input
13 GND Ground
14 CLK- LVDS Clock Data Input
15 CLK+ LVDS Clock Data Input
16 GND Ground
17
VEDID
DDC +3.3 V
18 NC
19 CLKEDID DDC Clock
20 DataEDID DDC Data
Note (1) Connector Part No.: DF19K-20P-1H or equivalent
Note (2) User’s connector Part No: DF19G-20S-1C or equivalent
Polarity
Negative
Positive
Negative
Positive
Negative
Positive
Negative
Positive
-
Remark
-
-
-
R0~R5,G0-
G1~G5,B0,B1
-
B2~B5,Hsync,Vsync,DE
LVDS Level
-
5.2 BACKLIGHT UNIT
Pin
Symbol
Description
1 HV High Voltage
2 LV Ground
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
Color
Pink
White
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20
DE
IN13
B1
IN6
G0
IN19
Vsync
IN12
B0
IN5
R5
IN18
IN17
IN16
Hsync
B5
B4
IN11
IN10
IN9
G5 G4 G3
IN4 IN3
IN2
R4 R3 R2
Signal for 1 DCLK Cycle (T)
IN15
B3
IN8
G2
IN1
R1
IN14
B2
IN7
G1
IN0
R0
11 / 23
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification. Version 0.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com

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