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PDF LQ043T1DG28 Data sheet ( Hoja de datos )
| Número de pieza | LQ043T1DG28 | |
| Descripción | LCD Module | |
| Fabricantes | Sharp | |
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LD-24311A-3
4. Input Terminal Names and Functions
Recommendation CN：[HIROSE] FH26G-67S-0.3SHBW(05) or [KYOCERA ELCO] 00 6281 067 2X2 829 +
Pin No Symbol I/O
Description
Remarks
1 LED_C (-) -
Power supply for LED (Cathode)
2 LED_A(+) -
Power supply for LED (Anode)
3 DGND1 -
Digital Ground
4 X1(R) O
Touch Panel Right Electrode
5 Y2(B) O
Touch Panel Bottom Electrode
6 X2(L) O
Touch Panel Left Electrode
7
Y1(T)
O
Touch Panel Top Electrode
8 AGND1 -
Analog Ground
9 VGH -
Connect a Stabilizing capacitor to GND
Note 4-1
10 C11P -
Connect a Booster capacitor to C11M
Note 4-1
11 C11M -
Connect a Booster capacitor to C11P
Note 4-1
12 C12P -
Connect a Booster capacitor to C12M
Note 4-1
13 C12M -
Connect a Booster capacitor to C12P
Note 4-1
14 VGL -
Connect a Stabilizing capacitor to GND
Note 4-1
15 C13P -
Connect a Booster capacitor to C13M
Note 4-1
16 C13M -
Connect a Booster capacitor to C13P
Note 4-1
17 AGND2 -
Analog Ground
18 DDVDH -
Connect a Stabilizing capacitor to GND
Note 4-1
19 C14P -
Connect a Booster capacitor to C14M
Note 4-1
20 C14M -
Connect a Booster capacitor to C14P
Note 4-1
21 VCC -
Booster input voltage pin
22 NC -
No connection
23 AGND3 -
Analog Ground
24 VCL2 -
Connect a Stabilizing capacitor to GND
Note 4-1
25 C21P -
Connect a Booster capacitor to C21M
Note 4-1
26 C21M -
Connect a Booster capacitor to C21P
Note 4-1
27 IOVCC -
Voltage input pin for logic I/O
Note 4-1
28 RESB I
System reset
29 DGND2 -
Digital Ground
30 IOVCC -
Voltage input pin for logic I/O
31 VDD -
Connect a Stabilizing capacitor to GND
Note 4-1
32 DGND3 -
Digital Ground
33 SHUT I
Sleep mode control
34 CSB I
Chip select pin of serial interface
35 SDI I
Data input pin in serial mode
36 SCK I
Clock input pin in serial mode
37 AGND4 -
Analog Ground
Note 4-1
38 DEN I
Display enable signal
39 B5 I
BLUE data signal(MSB)
40 B4 I
BLUE data signal
41 B3 I
BLUE data signal
5 Page 
LD-24311A-9
Characteristics
symbol Min Typ
VCC on to rising edge of RESB
tp-re 1 -
Register set to Falling edge of SHUT
re-shut
5
-
RESB on to rising edge of DOTCLK
re-clk
-
-
Falling edge of SHUT to display start
--
-- 1 line: 512 clk
-- 1 frame: 278 line
tshut-on
-
167
-- PIXCLK = 8.5MHz
※Display starts at 10th falling edge of VSYNC after the falling edge of SHUT.
Max
-
-
100
10
-
Units
ms
ms
usec
frame
msec
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