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MC74AC563 반도체 회로 부품 판매점

OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS



Motorola Semiconductors 로고
Motorola Semiconductors
MC74AC563 데이터시트, 핀배열, 회로
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MC74AC563
MC74ACT563
Octal DĆType Latch
with 3ĆState Outputs
The MC74AC563/74ACT563 is a high-speed octal latch with buffered common
Latch Enable (LE) and buffered common Output Enable (OE) inputs.
The MC74AC563/74ACT563 device is functionally identical to the MC74AC573/
74ACT573, but with inverted outputs.
Inputs and Outputs on Opposite Sides of Package
Allowing Easy Interface with Microprocessors
Useful as Input or Output Port for Microprocessors
Functionally Identical to MC74AC573/74ACT573 but with
Inverted Outputs
Outputs Source/Sink 24 mA
• ′ACT563 Has TTL Compatible Inputs
VCC O0 O1 O2 O3 O4 O5 O6 O7 LE
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
PIN NAMES
D0–D7
LE
OE
O0–O7
Data Inputs
Latch Enable Input
3-State Output Enable Input
3-State Latch Outputs
OCTAL D-TYPE
LATCH WITH
3-STATE OUTPUTS
N SUFFIX
CASE 738-03
PLASTIC
DW SUFFIX
CASE 751D-04
PLASTIC
LOGIC SYMBOL
D0 D1 D2 D3 D4 D5 D6 D7
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
DataSheet4 U .com
FACT DATA
5-1


MC74AC563 데이터시트, 핀배열, 회로
www.DataSheet4U.com
MC74AC563 MC74ACT563
FUNCTIONAL DESCRIPTION
The MC74AC563/74ACT563 contains eight D-type
latches with 3-state complementary outputs. When the Latch
Enable (LE) input is HIGH, data on the Dn inputs enters the
latches. In this condition the latches are transparent, i.e., a
latch output will change state each time its D input changes.
When LE is LOW the latches store the information that was
present on the D inputs a setup time preceding the
HIGH-to-LOW transition of LE. The 3-state buffers are
controlled by the Output Enable (OE) input. When OE is LOW,
the buffers are in the bi-state mode. When OE is HIGH the
buffers are in the high impedance mode but that does not
interfere with entering new data into the latches.
FUNCTION TABLE
Inputs
OE LE D
Internal Outputs
QO
Function
HXX
HH L
HHH
HLX
LHL
L HH
LLX
X
H
L
NC
H
L
NC
Z High Z
Z High Z
Z High Z
Z Latched
H Transparent
L Transparent
NC Latched
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
NC = No Change
LOGIC DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
DD DD D D DD
QQ QQ Q Q QQ
C CCC CC CC
LE
OE
O1 O2 O3 O4 O5 O6 O7 O8
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
DataSheet4 U .com
FACT DATA
5-2




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MC74AC563 latch

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MC74AC563

OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS - Motorola Semiconductors



MC74AC564

OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS - Motorola Semiconductors