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PDF 74LVT573PW Data sheet ( Hoja de datos )
| Número de pieza | 74LVT573PW | |
| Descripción | 3.3V Octal D-type transparent latch 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74LVT573
3.3V Octal D-type transparent latch
(3-State)
Product specification
Supersedes data of 1995 Nov 14
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors
1 page  
Philips Semiconductors
3.3V Octal D-type transparent latch
(3-State)
Product specification
74LVT573
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
MIN TYP1 MAX
UNIT
VIK
VOH
VOL
VRST
II
IOFF
IHOLD
IEX
IPU/PD
Input clamp voltage
VCC = 2.7V; IIK = –18mA
VCC = 2.7 to 3.6V; IOH = –100µA
High-level output voltage
VCC = 2.7V; IOH = –8mA
VCC = 3.0V; IOH = –32mA
VCC = 2.7V; IOL = 100µA
VCC = 2.7V; IOL = 24mA
Low-level output voltage
VCC = 3.0V; IOL = 16mA
VCC = 3.0V; IOL = 32mA
Power-up output low voltage5
VCC = 3.0V; IOL = 64mA
VCC = 3.6V; IO = 1mA; VI = GND or VCC
Input leakage current
VCC = 0 or 3.6V; VI = 5.5V
VCC = 3.6V; VI = VCC or GND
VCC = 3.6V; VI = VCC
VCC = 3.6V; VI = 0
Control pins
Data pins4
Output off current
Bus Hold current A inputs7
Current into an output in the
High state when VO > VCC
VCC = 0V; VI or VO = 0 to 4.5V
VCC = 3V; VI = 0.8V
VCC = 3V; VI = 2.0V
VCC = 0V to 3.6V; VCC = 3.6V
VO = 5.5V; VCC = 3.0V
Power up/down 3-State output VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC;
current3
OE/OE = Don’t care
–0.9 –1.2
VCC-0.2 VCC-0.1
2.4 2.5
2.0 2.2
0.1 0.2
0.3 0.5
0.25 0.4
0.3 0.5
0.4 0.55
0.13 0.55
1 10
±0.1 ±1
0.1 1
–1 -5
75
–75
±500
1
150
–150
±100
60 125
1 ±100
V
V
V
V
µA
µA
µA
µA
µA
IOZH
IOZL
3-State output High current
3-State output Low current
VCC= 3.6V; VO = 3V; VI = VIL or VIH
VCC= 3.6V; VO = 0.5V; VI = VIL or VIH
15
µA
–1 –5
ICCH
VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0
0.13 0.19
ICCL Quiescent supply current
VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0
3 12 mA
ICCZ
VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 05
0.13 0.19
∆ICC
Additional supply current per
input pin2
VCC = 3V to 3.6V; One input at VCC-0.6V,
Other inputs at VCC or GND
0.1 0.2 mA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND
3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a
transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only
4. Unused pins at VCC or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
6. ICCZ is measured with outputs pulled to VCC or GND.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 19
5
5 Page 
Philips Semiconductors
3.3V Octal D-type transparent latch
(3-State)
NOTES
Product specification
74LVT573
1998 Feb 19
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 74LVT573PW.PDF ] | |
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